SST29EE010-150-4I-NN データシートの表示（PDF） - Silicon Storage Technology
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SST29EE010-150-4I-NN Datasheet PDF : 30 Pages
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Data Sheet
TABLE 2: PIN DESCRIPTION
Symbol
A16-A7
A6-A0
DQ7-DQ0
Pin Name
Row Address Inputs
Column Address Inputs
Data Input/output
CE#
OE#
WE#
VDD
VSS
NC
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
1 Mbit Page-Write EEPROM
SST29EE010 / SST29VE010
Functions
To provide memory addresses. Row addresses define a page for a Write cycle.
Column Addresses are toggled to load page data
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide: 5.0V supply (4.5-5.5V) for SST29EE010
2.7V supply (2.7-3.6V) for SST29VE010
Unconnected pins.
T2.3 1061
TABLE 3: OPERATION MODES SELECTION
Mode
Read
Page-Write
Standby
Write Inhibit
Software Chip-Erase
Product Identification
Software Mode
SDP Enable Mode
SDP Disable Mode
CE#
VIL
VIL
VIH
X
X
VIL
OE#
VIL
VIH
X1
VIL
X
VIH
WE#
VIH
VIL
X
X
VIH
VIL
DQ
DOUT
DIN
High Z
High Z/ DOUT
High Z/ DOUT
DIN
VIL VIH VIL Manufacturer’s ID (BFH)
Device ID2
VIL
VIH
VIL
VIL
VIH
VIL
1. X can be VIL or VIH, but no other value.
2. Device ID = 07H for SST29EE010 and 08H for SST29VE010
Address
AIN
AIN
X
X
X
AIN, See Table 4
See Table 4
See Table 4
See Table 4
T3.4 1061
©2005 Silicon Storage Technology, Inc.
6
S71061-11-000
9/05
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