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4052(2012) データシートの表示(PDF) - Unisonic Technologies

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コンポーネント説明
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4052
(Rev.:2012)
UTC
Unisonic Technologies UTC
4052 Datasheet PDF : 6 Pages
1 2 3 4 5 6
4052
CMOS IC
„ DYNAMIC ELECTRICAL CHARACTERISTICS
(CL = 50pF, TA=25°C, VEEVSS, unless otherwise specified)
PARAMETER
VDD-VEE
SYMBOL
VDC
TEST CONDITIONS
MIN TYP MAX UNIT
Propagation Delay Times
5 tPLH, tPHL =(0.17 ns/pF)CL + 21.5ns
30 75 ns
Switch Input to Switch tPLH, tPHL
Output (RL = 10 k)
10 tPLH, tPHL =(0.08 ns/pF)CL + 8.0ns
15 tPLH, tPHL =(0.06 ns/pF)CL + 7.0ns
12 30 ns
10 25 ns
Inhibit to Output
tPHZ, tPLZ
tPZH, tPZL
5 (RL=10k, VEE=VSS)
10 Output “1” or “0” to High Impedance,
15 or High Impedance to “1” or “0” Level
300 600 ns
155 310 ns
125 250 ns
5
325 650 ns
Control Input to Output
tPLH, tPHL
10 RL = 10 k, VEE = VSS
130 260 ns
15
90 180 ns
Total Harmonic Distortion
THD
10 RL = 10K, f = 1 kHz, VIN = 5 VPP
0.07
%
Bandwidth
BW
10 RL = 1k, VIN = 1/2 (VDD–VEE) p–p,
17
CL = 50pF, 20 Log (VOUT/VIN) = -3dB)
MHz
Off Channel Feedthrough
Attenuation
10 RL=1K, VIN = 1/2 (VDD–VEE) p–p
fIN = 30MHz
-50
dB
Channel Separation
10 RL = 1k, VIN = 1/2 (VDD–VEE) p–p
fIN = 3MHz
-50
dB
Crosstalk, Control Input to
Common O/I
10 R1 = 1k, RL = 10kControl
tTLH = tTHL = 20ns, Inhibit = VSS
75
mV
Note: 1. Data of “TYP” is intended as an indication of the IC’s potential performance.
2. For voltage drops across the switch(ΔVSW)>600mV (>300mV at high temperature), excessive VDD current
may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
4 of 6
QW-R502-013.E

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