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56F8013 データシートの表示(PDF) - Freescale Semiconductor

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56F8013
Freescale
Freescale Semiconductor Freescale
56F8013 Datasheet PDF : 126 Pages
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2.2 56F8013/56F8011 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must
be programmed.
Table 2-3 56F8013/56F8011 Signal and Package Information for the 32-Pin LQFP
Signal LQFP
Name Pin No.
Type
State During
Reset
Signal Description
VDD
26
Supply
Supply I/O Power — This pin supplies 3.3V power to the chip I/O interface.
VSS
13
Supply
Supply VSS — These pins provide ground for chip logic and I/O drivers.
VSS
27
VDDA
8
Supply
Supply ADC Power — This pin supplies 3.3V power to the ADC modules. It
must be connected to a clean analog power supply.
VSSA
9
Supply
Supply ADC Analog Ground — This pin supplies an analog ground to the
ADC modules.
VCAP
25
Supply
Supply
VCAP — Connect a 2.2 μF or greater bypass capacitor between this
pin and VSS_IO, which is required by the internal voltage regulator
for proper chip operation. See Section 10.2.1.
GPIOB6
1
(RXD)
Input/
Output
Input
Input with
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data — SCI receive data input.
(SDA1)
Input/
Output
Serial Data — This pin serves as the I2C serial data line.
(CLKIN)
Input
Clock Input — This pin serves as an optional external clock input.
After reset, the default state is GPIOB6. The alternative peripheral
functionality is controlled via the SIM (See Section 6.3.8) and the
CLKMODE bit of the OCCS Oscillator Control Register.
1. This signal is also brought out on the GPIOB1 pin.
Return to Table 2-2
56F8013/56F8011 Data Sheet, Rev. 12
18
Freescale Semiconductor

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