56F8011 データシートの表示（PDF） - Freescale Semiconductor

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56F8011

16-bit Digital Signal Controllers

Freescale Semiconductor 

Version History

Rev. 8

Rev. 9

Rev. 10

Rev. 11

Document Revision History (Continued)

Description of Change

• In Table 10-4, added an entry for flash data retention with less than 100 program/erase

cycles (minimum 20 years).

• In Table 10-6, changed the device clock speed in STOP mode from 8MHz to 4MHz.

• In Table 10-12, changed the typical relaxation oscillator output frequency in Standby mode

from 400kHz to 200kHz.

In Table 10-19, changed the maximum ADC internal clock frequency from 8MHz to 5.33MHz.

Added the following note to the description of the TMS signal in Table 2-3:

Note: Always tie the TMS pin to VDD through a 2.2K resistor.

Removed “Preliminary” and made changes throughout the book, including changes in the

following sections:

• Feature additions to Section 1.1.4

• Deleted Section 1.4.1

• Table 2-3

• Added diagram in Section 3.5.1

• Added paragraph to Section 5.3

• Deleted Section 5.5, “Operating Modes”

• Added features to Section 6.2

• Section 6.3.8.1 and Section 6.3.8.2

• Deleted note from Section 6.3.8.3

• Clarifications to Section 6.3 register descriptions

• Removed paragraph from Section 6.4

Rev. 12

• Revised Section 7, Security Features.

• Updated temperature information in Table 10-1 and Table 10-4.

• Fixed miscellaneous errors.

Please see http://www.freescale.com for the most current data sheet revision.

56F8013/56F8011 Data Sheet, Rev. 12

Freescale Semiconductor

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