DSP56F802(2005) データシートの表示（PDF） - Freescale Semiconductor

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DSP56F802
(Rev.:2005)

16-bit Digital Signal Controllers

Freescale Semiconductor 

Part 1 Overview

1.1 56F802 Features

1.1.1 Processing Core

• Efficient 16-bit 56800 family controller engine with dual Harvard architecture

• As many as 40 Million Instructions Per Second (MIPS) at 80 MHz core frequency

• Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)

• Two 36-bit accumulators including extension bits

• 16-bit bidirectional barrel shifter

• Parallel instruction set with unique processor addressing modes

• Hardware DO and REP loops

• Three internal address buses and one external address bus

• Four internal data buses and one external data bus

• Instruction set supports both DSP and controller functions

• Controller style addressing modes and instructions for compact code

• Efficient C compiler and local variable support

• Software subroutine and interrupt stack with depth limited only by memory

• JTAG/OnCE debug programming interface

1.1.2 Memory

• Harvard architecture permits as many as three simultaneous accesses to program and data memory

• On-chip memory including a low-cost, high-volume Flash solution

— 8K × 16 bit words of Program Flash

— 1K × 16-bit words of Program RAM

— 2K × 16-bit words of Data Flash

— 1K × 16-bit words of Data RAM

— 2K × 16-bit words of Boot Flash

• Programmable Boot Flash supports customized boot code and field upgrades of stored code through a

variety of interfaces (JTAG)

1.1.3 Peripheral Circuits for 56F802

• Pulse Width Modulator (PWM) with six PWM outputs with deadtime insertion and fault protection;

supports both center- and edge-aligned modes

• Two 12-bit, Analog-to-Digital Converters (ADCs), 1 x 2 channel and 1 x 3 channel, which support two

simultaneous conversions; ADC and PWM modules can be synchronized

• Two General Purpose Quad Timers with two external pins (or two GPIO)

• Serial Communication Interface (SCI) with two pins (or two GPIO)

• Four multiplexed General Purpose I/O (GPIO) pins

56F802 Technical Data, Rev. 7

4

Freescale Semiconductor

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