56F8135 データシートの表示（PDF） - Freescale Semiconductor
部品番号
コンポーネント説明
メーカー
56F8135 Datasheet PDF : 160 Pages
| |||
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
GPIOB4
31
Schmitt
Input
Port B GPIO — This GPIO pin can be individually programmed
Input/
as an input or output pin.
Output
(A20)
Output
Tri-stated
Address Bus — A20 specifies one of the address lines for
external program or data memory accesses. Depending upon
the state of the DRV bit in the EMI bus control register (BCR),
A20 and EMI control signals are tri-stated when the external bus
is inactive.
(prescaler_
clock)
Output
Output
Clock Output — can be used to monitor the prescaler_clock on
GPIOB4.
After reset, the default state is GPIO.
This pin can also be used to view the prescaler_clock. In these
cases, the GPIOB_PER can be used to disable the GPIO. The
CLKOSR register in the SIM can then be used to choose
between address and clock functions; see
Part 6.5.7 for details.
To deactivate the internal pull-up resistor, clear bit 4 in the
GPIOB_PUR register.
D7
22
Input/
Tri-stated Data Bus — D7 - D10 specify part of the data for external
Output
program or data memory accesses. Depending upon the state of
the DRV bit in the EMI bus control register (BCR), D7 - D10 are
tri-stated when the external bus is inactive
(GPIOF0)
D8
23
(GPIOF1)
D9
24
(GPIOF2)
D10
26
(GPIOF3)
Input/
Output
Input
Port F GPIO — These four GPIO pins can be individually
programmed as input or output pins.
After reset, these pins default to data bus functionality and
should be programmed as GPIO.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
Note: Primary function is not available in this package
configuration; GPIO function must be used instead.
56F8335 Technical Data, Rev. 1
20
Freescale Semiconductor
Preliminary
Share Link: 