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A6818EA データシートの表示(PDF) - Allegro MicroSystems

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A6818EA Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
6818
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C (A6818S-) or over operating temperature
range (A6818E- and A6818K-), VBB = 60 V unless otherwise noted.
Characteristic
Symbol Test Conditions
Limits @ VDD = 3.3 V Limits @ VDD = 5 V
Mln. Typ. Max. Min. Typ. Max. Units
Output Leakage Current
Output Voltage
Output Pull-Down Current
Input Voltage
Input Current
Input Clamp Voltage
Serial Data Output Voltage
Maximum Clock Frequency
Logic Supply Current
Load Supply Current
Blanking-to-Output Delay
Strobe-to-Output Delay
Output Fall Time
Output Rise Time
ICEX
VOUT(1)
VOUT(0)
IOUT(0)
VIN(1)
VIN(0)
IIN(1)
IIN(0)
VIK
VOUT(1)
VOUT(0)
fc
IDD(1)
IDD(0)
IBB(1)
IBB(0)
tdis(BQ)
ten(BQ)
tp(STH-QL)
tp(STH-QH)
tf
tr
VOUT = 0 V
IOUT = -25 mA
IOUT = 1 mA
VOUT = 5 V to VBB
VIN = VDD
VIN = 0.8 V
IIN = -200 µA
IOUT = -200 µA
IOUT = 200 µA
All Outputs High
All Outputs Low
All Outputs High, No Load
All Outputs Low
CL = 30 pF, 50% to 50%
CL = 30 pF, 50% to 50%
RL = 2.3 k, CL 30 pF
RL = 2.3 k, CL 30 pF
RL = 2.3 k, CL 30 pF
RL = 2.3 k, CL 30 pF
— <-0.1 -15
57.5 58.3 —
— 1.0 1.5
2.5 5.0 —
2.2
— 1.1
— <0.01 1.0
— <-0.01 -1.0
— -0.8 -1.5
2.8 3.05 —
— 0.15 0.3
10
33
— 0.25 0.75
— 0.25 0.75
— 4.5 9.0
— 0.2 20
— 0.7 2.0
— 1.8 3.0
— 0.7 2.0
— 1.8 3.0
2.4
12
2.4
12
— <-0.1 -15
57.5 58.3 —
— 1.0 1.5
2.5 5.0 —
3.3 — —
— — 1.7
— <0.01 1.0
— <-0.01 -1.0
— -0.8 -1.5
4.5 4.75 —
— 0.15 0.3
10 33 —
— 0.3 1.0
— 0.3 1.0
— 4.5 9.0
— 0.2 20
— 0.7 2.0
— 1.8 3.0
— 0.7 2.0
— 1.8 3.0
2.4 — 12
2.4 — 12
µA
V
V
mA
V
V
µA
µA
V
V
V
MHz
mA
mA
mA
µA
µs
µs
µs
µs
µs
µs
Output Slew Rate
dV/dt
RL = 2.3 k, CL 30 pF
4.0
20
4.0 — 20
V/µs
Clock-to-Serial Data Out Delay tp(CH-SQX) IOUT = ±200 µA
50
— 50 —
ns
Negative current is defined as coming out of (sourcing) the specified device terminal.
Typical data is is for design information only and is at TA = +25°C.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000

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