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73S8009R-IMR データシートの表示(PDF) - Teridian Semiconductor Corporation

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73S8009R-IMR
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
73S8009R-IMR Datasheet PDF : 23 Pages
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73S8009R Data Sheet
DS_8009R_056
Symbol Parameter
Condition
Min Nom Max Unit
Interface Requirements – Data Signals: I/O, AUX1, AUX2, and host interfaces: I/OUC, AUX1UC,
AUX2UC. ISHORTL, ISHORTH, and VINACT requirements do not pertain to I/OUC, AUX1UC, AUX2UC.
VOH
Output level, high (I/O, IOH = 0 µA
AUX1, AUX2)
IOH = -40 µA
0.9 * VCC
VCC+0.1
V
0.75 * VCC – VCC+0.1
VOH
Output level, high (I/OUC, IOH = 0 µA
AUX1UC, AUX2UC)
IOH = -40 µA
VOL
Output level, low (I/O, IOL = 1 mA
AUX1, AUX2)
0.9 * VDD
VDD+0.1
V
0.75 * VDD – VDD+0.1
– 0.15 * VCC V
VOL
Output level, low (I/OUC, IOL = 1 mA
AUX1UC, AUX2UC)
0.3
V
VIH
Input level, high (I/O,
AUX1, AUX2)
0.6 * VCC – VCC+0.30 V
VIH
Input level, high (I/OUC,
AUX1UC, AUX2UC)
1.8
– VDD+0.30 V
VIL
Input level, low (I/O,
AUX1, AUX2)
-0.15
– 0.2 * VCC V
VIL
Input level, low (I/OUC,
AUX1UC, AUX2UC)
-0.3
0.8
V
VINACT
ILEAK
Output voltage when
outside of session
Input leakage
IOL = 0
IOL = 1 mA
VIH = VCC
0.1
V
0.3
10
µA
IIL
Input current, low (I/O, VIL = 0
AUX1, AUX2)
0.65
mA
IIL
Input current, low (I/OUC, VIL = 0
AUX1UC, AUX2UC)
0.7
mA
ISHORTL Short circuit output
current
For output low, shorted to
VCC through 33
15
mA
ISHORTH Short circuit output
current
For output high, shorted to
ground through 33
15
mA
tR, tF Output rise time, fall time For I/O, AUX1, AUX2,
CL = 80 pF, 10% to 90%.
For I/OUC, AUX1UC,
AUX2UC, CL=50 pF, 10%
to 90%.
100
ns
tIR, tIF Input rise, fall times
1
µs
RPU
Internal pull-up resistor Output stable for >200 ns
8
11
14
k
FDMAX Maximum data rate
1
MHz
TFDIO Delay, I/O to I/OUC, AUX1 Edge from master to slave
60
100
200
ns
to AUX1UC, AUX2 to
measured at 50% point
TRDIO AUX2UC, I/OUC to I/O,
25
90
AUX1UC to AUX1,
AUX2UC to AUX2
(respectively falling edge
to falling edge and rising
edge to rising edge)
CIN
Input capacitance
10
pF
10
Rev. 1.3

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