73S8024RN-32IM/F データシートの表示（PDF） - Teridian Semiconductor Corporation

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73S8024RN-32IM/F

Low Cost Smart Card Interface

Teridian Semiconductor Corporation 

DS_8024RN_020

73S8024RN Data Sheet

4 Card Power Supply

The card power supply is internally provided by the LDO regulator, and controlled by the digital

ISO-7816-3 sequencer. Card voltage selection is carried out by the digital input 5V/#V.

Choice of the VCC Capacitor:

Depending on the applications, the requirements in terms of both VCC minimum voltage and transient

currents that the interface must be able to provide to the card are different. An external capacitor must be

connected between the VCC pin and to the card ground in order to guarantee stability of the LDO

regulator, and to handle the transient requirements. The type and value of this capacitor can be

optimized to meet the desired specification. Table 1 shows the recommended capacitors for each VPC

power supply configuration and applicable specification.

Table 1: Choice of VCC Pin Capacitor

Specification Requirements

Specification

Min VCC Voltage

Allowed During

Transient Current

Max

Transient

Current

Charge

EMV 4.0

4.6V

30nA.s

ISO-7816-3

4.5V

20nA.s

NDS

4.6V

40nA.s

System Requirements

Min VPC

Power

Supply

Required

Capacitor

Type

Capacitor Value

4.75V

4.75V

4.85V

X5R/X7R

w/

ESR <

100mΩ

3.3 μF

1 μF

1 μF

Note: Capacitor value for NDS implementation is also defined by the deactivation time requirement.

5 Over-Temperature Monitor

A built-in detector monitors die temperature. Upon an over-temperature condition, a card deactivation

sequence is initiated, and an error or fault condition is reported to the system controller.

6 On-Chip Oscillator and Card Clock

The 73S8024RN device has an on-chip oscillator that can generate the smart card clock using an

external crystal (connected between the pins XTALIN and XTALOUT) to set the oscillator frequency.

When the clock signal is available from another source, it can be connected to the pin XTALIN, and the

pin XTALOUT should be left unconnected.

The card clock frequency may be chosen between four different division rates, defined by digital inputs

CLKDIV 1 and CLKDIV 2, as per Table 2.

Table 2: Card Clock Frequency

CLKDIV1

0

0

1

1

CLKDIV2

0

1

0

1

CLK

⅛ XTALIN

¼ XTALIN

XTALIN

½ XTALIN

Card power down mode (card clock STOP) is supported and is controllable through the dedicated digital

inputs CLKSTOP and CLKLEV (not supported in the 20QFN package).

Rev. 1.8

9

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