74ABT374CSCX_NL(2005) データシートの表示（PDF） - Fairchild Semiconductor
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74ABT374CSCX_NL Datasheet PDF : 11 Pages
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Functional Description
The ABT374 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When OE is
HIGH, the outputs are in a high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Logic Diagram
Function Table
Inputs Internal Outputs
Function
OE CP D
Q
H H L NC
H H H
H
L
NC
L
H
H
H
L
L
L
L
H
H
L H L NC
L H H NC
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
LOW-to-HIGH Transition
NC No Change
O
Z Hold
Z Hold
Z Load
Z Load
L Data Available
H Data Available
NC No Change in Data
NC No Change in Data
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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