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74AHC240BQ データシートの表示(PDF) - NXP Semiconductors.

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74AHC240BQ
NXP
NXP Semiconductors. NXP
74AHC240BQ Datasheet PDF : 16 Pages
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NXP Semiconductors
4. Functional diagram
74AHC240; 74AHCT240
Octal buffer/line driver; inverting; 3-state
2 1A0
17 2A0
4 1A1
15 2A1
6 1A2
13 2A2
8 1A3
11 2A3
1 1OE
19 2OE
Fig 1. Logic symbol
1Y0 18
2Y0 3
1Y1 16
2Y1 5
1Y2 14
2Y2 7
1Y3 12
2Y3 9
mgu779
5. Pinning information
5.1 Pinning
1
EN
2
18
4
16
6
14
8
12
19
EN
11
9
13
7
15
5
17
3
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Fig 2. IEC logic symbol
1OE 1
1A0 2
2Y0 3
1A1 4
2Y1 5
1A2 6
2Y2 7
1A3 8
2Y3 9
GND 10
74AHC240
74AHCT240
20 VCC
19 2OE
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
11 2A3
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Fig 3. Pin configuration SO20 and TSSOP20
terminal 1
index area
74AHC240
74AHCT240
1A0 2
2Y0 3
1A1 4
2Y1 5
1A2 6
2Y2 7
1A3 8
2Y3 9
GND(1)
19 2OE
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
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Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration DHVQFN20
74AHC_AHCT240
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 26 November 2010
© NXP B.V. 2010. All rights reserved.
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