74AHC74PW データシートの表示（PDF） - NXP Semiconductors.
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74AHC74PW Datasheet PDF : 18 Pages
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NXP Semiconductors
74AHC74; 74AHCT74
Dual D-type flip-flop with set and reset; positive-edge trigger
6. Functional description
Table 3.
Control
nSD
L
H
L
H
H
Function table[1]
nRD
H
L
L
H
H
nCP
X
X
X
↑
↑
Input
nD
X
X
X
L
H
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW to HIGH transition;
Qn+1 = state after the next LOW to HIGH CP transition;
X = don’t care.
7. Limiting values
Output
nQ
nQ
H
L
L
H
H
H
-
-
-
-
nQn+1
L
H
-
L
H
nQn+1
H
L
-
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
VI
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < −0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
VO = −0.5V to (VCC + 0.5 V)
Tamb = −40 °C to +125 °C
−0.5
−0.5
[1] −20
[1] −20
−25
-
−75
−65
[2] -
+7.0
V
+7.0
V
-
mA
+20
mA
+25
mA
+75
mA
-
mA
+150
°C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For TSSOP14 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
74AHC_AHCT74_5
Product data sheet
Rev. 05 — 9 June 2008
© NXP B.V. 2008. All rights reserved.
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