74AHCT259D データシートの表示（PDF） - NXP Semiconductors.
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74AHCT259D Datasheet PDF : 17 Pages
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NXP Semiconductors
74AHC259; 74AHCT259
8-bit addressable latch
VCC
An input
GND
VOH
Qn output
VOL
VM
tPHL
VM
tPLH
001aah122
Fig 6.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Address input to output propagation delays
VCC
D input
GND
VCC
LE input
GND
VOH
Qn output
VOL
VM
tW
tPHL
VM
tPLH
Fig 7.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Enable input to output propagation delays and pulse width
001aah121
VCC
MR input
GND
VOH
Qn output
VOL
VM
tW
tPHL
VM
001aah124
Fig 8.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Conditional reset input to output propagation delays
74AHC_AHCT259_2
Product data sheet
Rev. 02 — 15 May 2008
© NXP B.V. 2008. All rights reserved.
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