SN74LS280 データシートの表示（PDF） - ON Semiconductor
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SN74LS280 Datasheet PDF : 4 Pages
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SN74LS280
9-Bit Odd/Even Parity
Generators/Checkers
The SN74LS280 is a Universal 9-Bit Parity Generator / Checker. It
features odd / even outputs to facilitate either odd or even parity. By
cascading, the word length is easily expanded.
The LS280 is designed without the expander input implementation,
but the corresponding function is provided by an input at Pin 4 and the
absence of any connection at Pin 3. This design permits the LS280 to
be substituted for the LS180 which results in improved performance.
The LS280 has buffered inputs to lower the drive requirements to one
LS unit load.
• Generates Either Odd or Even Parity for Nine Data Lines
• Typical Data-to-Output Delay of only 33 ns
• Cascadable for n-Bits
• Can Be Used To Upgrade Systems Using MSI Parity Circuits
• Typical Power Dissipation = 80 mW
INPUTS
VCC F E D C B A
14 13 12 11 10 9 8
F ED CB
G
A
∑∑
H
I EVEN ODD
12
GH
INPUTS
34567
NC I ∑ ∑ GND
INPUT EVEN ODD
OUTPUTS
FUNCTION TABLE
NUMBER OF INPUTS A
THRU 1 THAT ARE HIGH
OUTPUTS
∑EVEN ∑ODD
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H
L
L
H
H = HIGH Level, L = LOW Level
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
VCC
Supply Voltage
TA
Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0
25
70
°C
IOH
Output Current – High
IOL
Output Current – Low
– 0.4 mA
8.0
mA
http://onsemi.com
LOW
POWER
SCHOTTKY
14
1
PLASTIC
N SUFFIX
CASE 646
14
1
SOIC
D SUFFIX
CASE 751A
ORDERING INFORMATION
Device
Package
Shipping
SN74LS280N 14 Pin DIP
2000 Units/Box
SN74LS280D
14 Pin
2500/Tape & Reel
© Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS280/D
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