DM74LS377N データシートの表示（PDF） - Fairchild Semiconductor
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DM74LS377N Datasheet PDF : 5 Pages
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October 1988
Revised March 2000
DM74LS377
Octal D-Type Flip-Flop with Common Enable and Clock
General Description
The DM74LS377 is an 8-bit register built using advanced
low power Schottky technology. This register consists of
eight D-type flip-flops with a buffered common clock and a
buffered common input enable. The device is packaged in
the space-saving (0.3 inch row spacing) 20-pin package.
Features
s 8-bit high speed parallel registers
s Positive edge-triggered D-type flip-flops
s Fully buffered common clock and enable inputs
Ordering Code:
Order Number Package Number
Package Description
DM74LS377WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS377N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
VCC = Pin 20
GND = Pin 10
Pin Descriptions
Pin Names
Description
E
D0–D7
CP
Q0–Q7
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Flip-Flop Outputs
Truth Table
Inputs
E
CP
Dn
H
L
L
X
X
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Output
Qn
No Change
H
L
© 2000 Fairchild Semiconductor Corporation DS009831
www.fairchildsemi.com
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