DM74LS377WM データシートの表示（PDF） - Fairchild Semiconductor

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DM74LS377WM

Octal D-Type Flip-Flop with Common Enable and Clock

Fairchild Semiconductor 

Functional Description

The DM74LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and

Enable input (E) are common to all flip-flops.

When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the reg-

ister will retain the present data independent of the CP.

Logic Diagram

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