74LVC10A データシートの表示（PDF） - Philips Electronics
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74LVC10A Datasheet PDF : 8 Pages
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Philips Semiconductors
Triple 3-input NAND gate
Product specification
74LVC10A
FEATURES
• Wide supply voltage range of 1.2 V to 3.6 V
• In accordance with JEDEC standard no. 8-1A.
• Inputs accept voltages up to 5.5 V
• CMOS low power consumption
• Direct interface with TTL levels
• Output capability: standard
• ICC category: SSI
DESCRIPTION
The 74LVC10A is a high performance, low power, low voltage, Si
gate CMOS device and superior to most advanced CMOS
compatible TTL families.
The 74LVC10A provides the 3-input NAND function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
nA, nB, nC to nY
CL = 50 pF;
VCC = 3.3 V
CI
Input capacitance
CPD
Power dissipation capacitance per gate VI = GND to VCC1
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi )ȍ (CL × VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
ȍ (CL × VCC2 × fo) = sum of the outputs.
TYPICAL
3.9
5.0
26
UNIT
ns
pF
pF
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVC10A D
74LVC10A DB
74LVC10A PW
NORTH AMERICA
74LVC10A D
74LVC10A DB
74LVC10APW DH
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
PIN CONFIGURATION
LOGIC SYMBOL
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 VCC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
SV00416
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
1, 3, 9
1A – 3A
2, 4, 10
1B – 3B
7
GND
12, 6, 8
1Y – 3Y
13, 5, 11
1C – 3C
14
VCC
NAME AND FUNCTION
Data inputs
Data inputs
Ground (0 V)
Data outputs
Data inputs
Positive supply voltage
1998 Apr 28
2
1 1A
2 1B
13 1C
3 2A
4 2B
5 2C
9 3A
10 3B
11 3C
1Y 12
2Y 6
3Y 8
SV00417
853-1973 19308
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