74LVC1G08GW-Q100 データシートの表示（PDF） - NXP Semiconductors.

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74LVC1G08GW-Q100

Single 2-input AND gate

NXP Semiconductors. 

NXP Semiconductors

74LVC1G08-Q100

Single 2-input AND gate

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature

range

74LVC1G08GW-Q100 40 C to +125 C

74LVC1G08GV-Q100 40 C to +125 C

Name Description

TSSOP5

SC-74A

plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

plastic surface-mounted package; 5 leads

4. Marking

Version

SOT353-1

SOT753

Table 2. Marking

Type number

74LVC1G08GW-Q100

74LVC1G08GV-Q100

Marking code[1]

VE

V08

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

1B

2A

Y4

mna113

Fig 1. Logic symbol

1

&

4

2

mna114

Fig 2. IEC logic symbol

6. Pinning information

6.1 Pinning

74LVC1G08-Q100

B1

A2

5 VCC

GND 3

Fig 4. Pin configuration SOT353-1 and SOT753

4Y

aaa-003146

A

B

Fig 3. Logic diagram

Y

mna221

74LVC1G08_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 9 July 2012

© NXP B.V. 2012. All rights reserved.

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