74LVX573 データシートの表示（PDF） - STMicroelectronics

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74LVX573

LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS

STMicroelectronics 

74LVX573

CAPACITIVE CHARACTERISTICS

Test Condition

Value

Symbol

Parameter

VCC

(V)

TA = 25°C

-40 to 85°C -55 to 125°C Unit

Min. Typ. Max. Min. Max. Min. Max.

CIN Input Capacitance 3.3

4 10

10

10 pF

COUT Output

Capacitance

3.3

6

pF

CPD Power Dissipation

Capacitance

3.3

fIN = 10MHz

29

pF

(note 1)

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)

TEST CIRCUIT

TEST

tPLH, tPHL

tPZL, tPLZ

tPZH, tPHZ

CL =15/50pF or equivalent (includes jig and probe capacitance)

RL = R1 = 1KΩ or equivalent

RT = ZOUT of pulse generator (typically 50Ω)

SWITCH

Open

VCC

GND

5/10

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