74VHC175N データシートの表示（PDF） - Fairchild Semiconductor
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74VHC175N Datasheet PDF : 7 Pages
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AC Electrical Characteristics
Symbol
Parameter
VCC
TA = 25°C
TA = −40°C to +85°C
Units
(V)
Min
Typ
Max
Min
Max
Conditions
fMAX
Maximum Clock
Frequency
3.3 ± 0.3 90
140
50
75
75
MHz CL = 15 pF
45
CL = 50 pF
5.0 ± 0.5 150
210
85
115
125
MHz CL = 15 pF
75
CL = 50 pF
tPLH
Propagation Delay
3.3 ± 0.3
tPHL
Time (CP to Qn or Qn)
7.5
11.5
1.0
13.5
ns CL = 15 pF
10.0
15.0
1.0
17.0
CL = 50 pF
5.0 ± 0.5
4.8
7.3
1.0
8.5
ns CL = 15 pF
6.3
9.3
1.0
10.5
CL = 50 pF
tPLH
Propagation Delay Time
3.3 ± 0.3
tPHL
(MR to Qn or Qn)
6.3
10.1
1.0
12.0
ns CL = 15 pF
8.8
13.6
1.0
15.5
CL = 50 pF
5.0 ± 0.5
4.3
6.4
1.0
7.5
ns CL = 15 pF
5.8
8.4
1.0
9.5
CL = 50 pF
tOSLH
Output to
3.3 ± 0.3
1.5
1.5
CL = 50 pF
tOSHL
Output Skew
5.0 ± 0.5
1.0
1.0
CL = 50 pF
(Note 4)
CIN
Input Capacitance
CPD
Power Dissipation
Capacitance
4
10
44
10
pF VCC = Open
pF (Note 5)
Note 4: Parameter guaranteed by design. tOSLH = |tPLHmax − tPLHmin|; tOSHL =| tPHLmax − tPHLmin|.
Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained from the equation: ICC (opr.) = CPD * VCC * fIN + ICC/4 (per F/F), and the total CPD when n pcs of the Flip-Flop operate can
be calculated by the following equation: CPD (total) = 30 + 14 • n
AC Operating Requirements
Symbol
Parameter
tW(L)
tW(H)
tW(L)
Minimum Pulse Width (CP)
Minimum Pulse Width (MR)
tS
Minimum Setup Time (Dn to CP)
tH
Minimum Hold Time (Dn to CP)
tREC
Minimum Removal Time (MR)
Note 6: VCC is 3.3 ± 0.3V or 5.0 ± 0.5V
VCC
(V)
(Note 6)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
TA = 25°C
TA = −40°C to +85°C
Typ
Guaranteed Minimum
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
4.0
4.0
1.0
1.0
1.0
1.0
5.0
5.0
5.0
5.0
Units
ns
ns
ns
ns
ns
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