75N43102 データシートの表示（PDF） - Integrated Device Technology

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75N43102

NETWORK SEARCH ENGINE 32K x 72 Entries

Integrated Device Technology 

Network Search Engine 32K x 72 Entries

Datasheet Brief 75N43102

Features

■ Full Ternary 32K x 72 bit content addressable memory

■ Global Mask Registers

■ 72/144/288 multiple width lookups

■ 62.5M sustained lookups per second at 72 and 144 width lookups

■ Dual bus interface

■ Cascadable to 2 devices with no glue logic or latency penalty

■ Boundary Scan JTAG Interface (IEEE 1149.1compliant)

■ 1.5V match power supply

■ 2.5V core and I/O power supply

Bus Interface

The NSE utilizes a dual bus interface consisting of the NSE Request

Bus and the NSE Response Bus.

The NSE Request Bus is comprised of the Command Bus and the

Request Data Bus. The Command Bus handles the instruction to the NSE

while the Request Data Bus is the main data path to the NSE.

The 72 bit bi-directional Request Data Bus functions as a multiplexed

address and data bus, which performs the writing and reading of NSE

entries, as well as presenting lookup data to the device.

The NSE Response Bus is comprised of an independent unidirec-

tional Index Bus which drives the result of the lookup (or index) to an ASIC.

Functional Highlights

Data and Mask Array

The NSE has Data cell entries and associ-

ated Mask cell entries as shown in Fig. 1.1. This

combination of Data and Mask cell entries en-

ables the NSE to store 0, 1 or X, making it a full

ternary Network Search Engine. During a

lookup operation, both arrays are used along

with a Global Mask Register to find a match to a

requested data word.

Figure 1.1

Mask

Data

A6435 drw 03

Command Bus

The Command Bus loads the specific instructions into the NSE. These

include:

■ Read or Write

A Read or Write instruction operates on a specified data entry, mask

entry, or register.

■ Lookup

A lookup can be requested in 72-bit, 144-bit or 288-bit widths. A 36-

bit lookup can be accomplished by using two Global Mask Registers.

Registers

There are three basic types of registers supported:

■ Configuration Registers are used at initialization to define the

segmentation of the entries.

■ Global Mask Registers are provided to support Lookup

instructions by masking individual bits during a search.

■ Reply Width Registers are used with Lookup operations.

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