78P2342JAT-IGT データシートの表示（PDF） - Teridian Semiconductor Corporation
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78P2342JAT-IGT Datasheet PDF : 36 Pages
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78P2342JAT
2-port E3/DS3/STS-1 LIU
with Jitter Attenuator
REGISTER DESCRIPTION (continued)
PORT-SPECIFIC REGISTERS
For PA[3:0] = N = 1-2 only. Accessing a register with port address greater than 2 constitutes an invalid
command, and the read/write operation will be ignored.
ADDRESS N-0: MODE CONTROL REGISTER
BIT
NAME
TYPE
DFLT
VALUE
DESCRIPTION
Transmitter Power-Down:
7 PDTX R/W
0
0 : Normal Operation
1 : Power-Down
NOTE: Relevant only when the REGEN bit is set. Otherwise, LBOx pin
selection prevails.
Receiver Power-Down:
6 PDRX R/W
0
0 : Normal Operation
1 : Power-Down
Transmitter Line Build-Out (DS3 and STS-1 only):
5
LBO R/W
1
0 : ≥ 225ft of cable attached to the cross-connect
1 : < 225ft of cable attached to the cross-connect
NOTE: Relevant only when the REGEN bit is set. Otherwise, LBOx pin
selection prevails.
Local (Analog) Loopback Mode Selection:
4 LLBKA R/W
0
[LLBKA : LLBKB] = 00 : Normal operation
01 : Local (Analog) Loopback
10 : Adjacent receiver input (see page 3)
3 LLBKB R/W
11 : Adjacent transmitter loopback (see page 3)
0
NOTE: Relevant only when the REGEN bit is set. Otherwise, LPBKx pin
selection prevails.
Remote (Digital) Loopback Enable:
2 RLBK R/W
0 : Normal Operation
0
1 : Loops RCLK, RPOS, and RNEG back onto TCLK, TPOS, and TNEG
NOTE: Relevant only when the REGEN bit is set. Otherwise, LPBKx pin
selection prevails.
Monitor Mode Enable:
1
MON R/W
Used for reception of split-off signals that are flat attenuated by at least
0
16dB but no more than 20dB.
0 : Disable
1 : Enable
Transmitter Output Enable:
0 : Transmit driver is disabled. Output is tri-stated.
0 TXEN R/W
1
1 : Normal Operation
NOTE: Relevant only when the REGEN bit is set. Otherwise, LBOx pin
selection prevails.
Page 10 of 36
2005 Teridian Semiconductor Corporation
Rev 2.2
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