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82574L データシートの表示(PDF) - Intel

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82574L Datasheet PDF : 472 Pages
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82574 GbE Controller—Introduction
1.0
1.1
1.2
Introduction
The 82574 family (82574L and 82574IT) are single, compact, low power components
that offer a fully-integrated Gigabit Ethernet Media Access Control (MAC) and Physical
Layer (PHY) port. The 82574 uses the PCI Express* (PCIe*) architecture and provides a
single-port implementation in a relatively small area so it can be used for server and
client configurations as a LAN on Motherboard (LOM) design. The 82574 family can also
be used in embedded applications such as switch add-on cards and network appliances.
External interfaces provided on the 82574:
• PCIe Rev. 1.1 (2.5 GHz) x1
• MDI (Copper) standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-
TX, and 10BASE-T applications (802.3, 802.3u, and 802.3ab)
• NC-SI or SMBus connection to a Manageability Controller (MC)
• IEEE 1149.1 JTAG (note that BSDL testing is NOT supported)
Additional product details:
• 9 mm x 9 mm 64-pin QFN package
• Support for PCI 3.0 Vital Product Data (VPD)
• IPMI MC pass through; multi-drop NC-SI
• TimeSync offload compliant with 802.1as specification
Scope
This document presents the architecture (including device operation, pin descriptions,
register definitions, etc.) for the 82574. This document is intended to be a reference for
software device driver developers, board designers, test engineers, or others who
might need specific technical or programming information about the 82574.
Number Conventions
Unless otherwise specified, numbers are represented as follows:
• Hexadecimal numbers are identified by an "0x" suffix on the number (0x2A, 0x12).
• Binary numbers are identified by a "b" suffix on the number (0011b). However,
values for SMBus transactions in diagrams are listed in binary without the "b" or in
hexadecimal without the "0x".
Any other numbers without a suffix are intended as decimal numbers.
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