A4403GEU-T データシートの表示（PDF） - Allegro MicroSystems

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A4403GEU-T

Valley Current Mode Control Buck Converter

Allegro MicroSystems 

A4403

Valley Current Mode Control Buck Converter

RFILTER and CFILTER (R7 and C7 in the Typical Application

diagram) should be placed close to the A4403 pins. The ground

sense should connect directly to the SGND and not to the power

ground.

Support Components The bootstrap capacitor (C2) and soft-

start capacitor (C5) should be ceramic X5R or X7R.

Estimate the RDS(on) of the buck switch at the given junction

temperature:

RDS(on)TJ = RDS(on)25C

⎛

⎜⎜ 1+

⎝

TJ – 25

170

⎞

⎟⎟

⎠

.

(20)

The static loss for each switch can be determined:

Thermal Considerations To ensure the A4403 operates in

the safe operating area, which effectively means restricting the

junction temperature to less than 150°C, several checks should be

made. The general approach is to work out what thermal imped-

ance, RJA , is required to maintain the junction temperature at

a given level, for a particular power dissipation. (Another factor

worth considering is that other power dissipating components

on the system PCB may influence the thermal performance of

the A4403. For example, the power loss contribution from the

recirculation diode and the sense resistor may cause the junction

temperature of the A4403 to be higher than expected.) It should

be noted that this process is usually an iterative one to achieve the

optimum solution.

The following steps can be used as a guideline for determining

the RJA for a suitable thermal solution. :

1. Estimate the maximum ambient temperature, TA(max) , of the

application.

PSTAT = ILOAD2 × D (max) × RDS(on)TJ ,

(21)

where ILOAD is the load.

(b) Switch dynamic losses

Both the turn-on and the turn-off losses can be estimated:

PDYN = VIN(min) ×

ILOAD

2

× 5 × 10 –9 × fSW× 1.6

,

(22)

where fSW is the switching frequency.

(c) Diode capacitance turn-on loss

At turn-on, an additional current spike flows into the switch, caus-

ing a loss as follows:

PDIODECAP =

CDIODE × VIN2 × fSW

2

,

(23)

where CDIODE is the body capacitance of the Schottky diode (D1).

2. Define the maximum junction temperature, TJ(max). Note that (d) Control losses

the absolute maximum is 150°C.

The control losses can be estimated as follows:

3. Determine the worst case power dissipation, PD(max). This will

occur at maximum load and minimum VIN. Contributors are:

(a) Switch static losses

Estimate the maximum duty cycle:

D (max) = VOUT + Vf

,

VIN (min) + Vf

(19)

PCTRL = IVINON × VIN ,

(24)

where IVINON is the quiescent current with the converter enabled.

(e) Gate charge losses

Estimate the charge losses as follows:

PGATE = Q × fSW × VIN ,

(25)

where Vf is the forward voltage drop of the Schottky diode (D1) where Q = 5 nC and is the charge that is required to turn on the

and sense resistor (R2, R3) under the given load current.

buck switch.

Allegro MicroSystems, Inc.

11

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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