VG26S18165C データシートの表示（PDF） - Vanguard International Semiconductor

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VG26S18165C

1,048,576 x 16 - Bit CMOS Dynamic RAM

Vanguard International Semiconductor  

VIS

VG26(V)(S)18165C/VG26(V)(S)18165D

1,048,576 x 16 - Bit

CMOS Dynamic RAM

Description

The device CMOS Dynamic RAM organized as 1,048,576 words x 16 bits with extended data out access mode. It is

fabricated with an advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V only

power supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application. Self-

refresh is supported and CBR cycles are being performed. lt is packaged in JEDEC standard 42-pin 400mil SOJ and

50(44)-pin 400mil TSOPII.

Features

• Single 5V(±10 %) or 3.3V(±10 %) only power supply

• High speed tRAC access time: 50/60ns

• Extended-data-out (EDO) page mode access

• I/O level: TTL compatible (Vcc = 5V)

LVTTL compatible (Vcc = 3.3V)

• 4 refresh modes:

- RAS only refresh

- CAS - before - RAS refresh

- Hidden refresh

- Self-refresh

• Refresh interval:

- RAS only refresh, CAS - before - RAS refresh and hidden refresh: 1024 cycles in 16 ms

- Self-refresh: 1024 cycles

• JEDEC standard pinout: 44-pin 400mil SOJ and 50(44)-pin 400mil TSOPII

Document:1G5-0179

Rev.1

Page 1

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