AD1928 データシートの表示（PDF） - Analog Devices
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AD1928 Datasheet PDF : 32 Pages
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48 47 46 45 44 43 42 41 40 39 38 37
AGND 1
MCLKI/XI 2
MCLKO/XO 3
AGND 4
AVDD 5
OL3 6
OR3 7
OL4 8
OR4 9
PD/RST 10
DSDATA4 11
DGND 12
AD1928
TOP VIEW
(Not to Scale)
SINGLE-ENDED
OUTPUT
36 AGND
35 FILTR
34 AGND
33 AVDD
32 AGND
31 OR2
30 OL2
29 OR1
28 OL1
27 CLATCH
26 CCLK
25 DGND
13 14 15 16 17 18 19 20 21 22 23 24
AD1928
NC = NO CONNECT
Figure 2. Pin Configuration, 48-Lead LQFP
Table 10. Pin Function Descriptions
Pin No. Input/Output Mnemonic
1
I
AGND
2
I
MCLKI/XI
3
O
MCLKO/XO
4
I
AGND
5
I
AVDD
6
O
OL3
7
O
OR3
8
O
OL4
9
O
OR4
10
I
PD/RST
11
I/O
DSDATA4
12
I
DGND
13
I
DVDD
14
I/O
DSDATA3
15
I/O
DSDATA2
16
I
DSDATA1
17
I/O
DBCLK
18
I/O
DLRCLK
19
I/O
ASDATA1
20
O
ADCTDMOUT
21
I/O
ABCLK
22
I/O
ALRCLK
23
I
CIN
24
I/O
COUT
25
I
DGND
26
I
CCLK
27
I
CLATCH
Description
Analog Ground.
Master Clock Input/Crystal Oscillator Input.
Master Clock Output/Crystal Oscillator Output.
Analog Ground.
Analog Power Supply. Connect to analog 3.3 V supply.
DAC Left 3 Output.
DAC Right 3Output.
DAC Left 4 Output.
DAC Right 4 Output.
Power-Down Reset (Active Low).
DAC Input 4 (Input to DAC L4 and R4)/DAC TDM Data Output 2/AUX ADC 1 Data Input.
Digital Ground.
Digital Power Supply. Connect to digital 3.3 V supply.
DAC Input 3 (Input to DAC L3 and R3)/DAC TDM Data Input 2/AUX DAC 2 Data Output.
DAC Input 2 (Input to DAC L2 and R2)/DAC TDM Data Output 1/AUX ADC 1 Data Input.
DAC Input 1 (Input to DAC L1 and R1)/DAC TDM Data Input 1/AUX ADC 2 Data Input.
Bit Clock for DACs.
LR Clock for DACs.
ADC Serial Data Output 1 (ADC L1 and R1)/ADC TDM Data Input/AUX DAC 1 Data Output.
ADC TDM Data Output.
Bit Clock for ADCs.
LR Clock for ADCs.
Control Data Input (SPI).
Control Data Output (SPI).
Digital Ground.
Control Clock Input (SPI).
Latch Input for Control Data (SPI).
Rev. 0 | Page 9 of 32
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