AD5415YRUZ-REEL(RevF) データシートの表示（PDF） - Analog Devices

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AD5415YRUZ-REEL
(Rev.:RevF)

Dual 12-Bit, High Bandwidth, Multiplying DAC with 4-Quadrant Resistors and Serial Interface

Analog Devices 

Data Sheet

Dual 12-Bit, High Bandwidth, Multiplying DAC

with 4-Quadrant Resistors and Serial Interface

AD5415

FEATURES

GENERAL DESCRIPTION

10 MHz multiplying bandwidth

On-chip 4-quadrant resistors allow flexible output ranges

INL of ±1 LSB

24-lead TSSOP package

2.5 V to 5.5 V supply operation

±10 V reference input

50 MHz serial interface

2.47 MSPS update rate

Extended temperature range: −40°C to 125°C

4-quadrant multiplication

Power-on reset

0.5 µA typical current consumption

Guaranteed monotonic

Daisy-chain mode

Readback function

APPLICATIONS

Portable battery-powered applications

Waveform generators

Analog processing

Instrumentation applications

Programmable amplifiers and attenuators

Digitally controlled calibration

Programmable filters and oscillators

Composite video

Ultrasound

Gain, offset, and voltage trimming

The AD54151 is a CMOS, 12-bit, dual-channel, current output

digital-to-analog converter (DAC). This device operates from a

2.5 V to 5.5 V power supply, making it suited to battery-powered

applications and other applications. As a result of being manufac-

tured on a CMOS submicron process, this device offers excellent

4-quadrant multiplication characteristics with large signal

multiplying bandwidths of 10 MHz.

The applied external reference input voltage (VREF) determines

the full-scale output current. An integrated feedback resistor (RFB)

provides temperature tracking and full-scale voltage output when

combined with an external current to voltage precision amplifier.

In addition, this device contains the 4-quadrant resistors necessary

for bipolar operation and other configuration modes.

This DAC uses a double-buffered, 3-wire serial interface that is

compatible with SPI®, QSPI™, MICROWIRE™, and most DSP

interface standards. In addition, a serial data out pin (SDO) allows

daisy-chaining when multiple packages are used. Data readback

allows the user to read the contents of the DAC register via the

SDO pin. On power-up, the internal shift register and latches

are filled with 0s, and the DAC outputs are at zero scale.

The AD5415 DAC is available in a 24-lead TSSOP package. The

EV-AD5415/49SDZ evaluation board is available for evaluating

DAC performance. For more information, see UG-296, Evaluating

the AD5415 Serial Input, Dual-Channel Current Output DAC.

FUNCTIONAL BLOCK DIAGRAM

R3A R2_3A R2A

VREFA R1A

AD5415

VDD

R3

R2

2R

2R

R1 RFB

2R 2R

RFBA

SYNC

SCLK

SDIN

SHIFT

REGISTER

INPUT

REGISTER

DAC

REGISTER

12-BIT

R-2R DAC A

IOUT1A

IOUT2A

SDO

LDAC

CLR

GND

POWER-ON

RESET

1 U.S. Patent Number 5,689,257.

INPUT

REGISTER

DAC

REGISTER

12-BIT

R-2R DAC B

R3

R2

2R

2R

R3B R2_3B R2B

Figure 1.

R1 RFB

2R 2R

VREFB R1B

IOUT1B

IOUT2B

RFBB

Rev. F

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