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AD5415(Rev0) データシートの表示(PDF) - Analog Devices

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AD5415 Datasheet PDF : 28 Pages
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AD5415
SPECIFICATIONS
Temperature range for Y Version: −40°C to +125°C.
VDD = 2.5 V to 5.5 V, VREF = 10 V, IOUT2A, IOUT2B = 0 V; all specifications TMIN to TMAX, unless otherwise noted.
DC performance measured with OP1177, ac performance with AD8038, unless otherwise noted.
Table 1.
Parameter
Min
Typ
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
Gain Error Temperature Coefficient1
±5
Bipolar Zero Code Error
Output Leakage Current
REFERENCE INPUT1
Reference Input Range
VREFA, VREFB Input Resistance
VREFA to VREFB Input Resistance
Mismatch
R1, RFB Resistance
R2, R3 Resistance
R2 to R3 Resistance Mismatch
DIGITAL INPUTS/OUTPUT1
Input High Voltage, VIH
Input Low Voltage, VIL
±10
8
10
1.6
16
20
16
20
0.06
1.7
Input Leakage Current, IIL
Input Capacitance
VDD = 4.5 V to 5.5 V
Output Low Voltage, VOL
Output High Voltage, VOH
VDD = 2.5 V to 3.6 V
Output Low Voltage, VOL
Output High Voltage, VOH
DYNAMIC PERFORMANCE1
Reference Multiplying Bandwidth
Output Voltage Settling Time
VDD − 1
VDD − 0.5
10
90
Digital Delay
20
Digital-to-Analog Glitch Impulse
3
Multiplying Feedthrough Error
Output Capacitance
Digital Feedthrough
5
Total Harmonic Distortion
−75
−75
Output Noise Spectral Density
25
Max Unit
Conditions
12
±1
−1/+2
±25
±25
±1
±10
Bits
LSB
LSB
mV
ppm FSR/°C
mV
nA
nA
V
12
kΩ
2.5
%
24
kΩ
24
kΩ
0.18 %
Guaranteed monotonic
Data = 0x0000, TA = 25°C, IOUT1
Data = 0x0000, IOUT1
Typical Resistor TC = −50 ppm/°C
DAC input resistance
Typ = 25°C, Max = 125°C
Typ = 25°C, Max = 125°C
V
0.8
V
0.7
V
1
µA
10
pF
VDD = 2.5 V to 5.5 V
VDD = 2.7 V to 5.5 V
VDD = 2.5 V to 2.7 V
0.4
V
V
ISINK = 200 µA
ISOURCE = 200 µA
0.4
V
V
ISINK = 200 µA
ISOURCE = 200 µA
MHz
160 ns
40
ns
nV-s
−75 dB
2
pF
4
pF
nV-s
dB
dB
nV/√Hz
VREF = 5 V p-p, DAC loaded all 1s
Measured to ±4 mV of FS; RLOAD = 100 Ω, CLOAD =
0s, 15 pF, DAC latch alternately loaded with 0s
and 1s
1 LSB change around major carry, VREF = 0 V
DAC latch loaded with all 0s, reference = 10 kHz
DAC latches loaded with all 0s
DAC latches loaded with all 1s
Feedthrough to DAC output with CS high and
alternate loading of all 0s and all 1s
VREF = 5 V p-p, all 1s loaded, f = 1 kHz
VREF = 5 V, sine wave generated from digital code
@ 1 kHz
Rev. 0 | Page 3 of 28

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