AD5543 データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD5543 Datasheet PDF : 20 Pages
| |||
Data Sheet
CIRCUIT OPERATION
The AD5543/AD5553 contain a 16-/14-bit current output,
DACs, serial input registers, and DAC registers. Both converters
use a 3-wire serial data interface.
DAC SECTION
The DAC architecture uses a current steering R-2R ladder
design. Figure 18 shows the typical equivalent DAC structure.
The DAC contains a matching feedback resistor for use with an
external operational amplifier (see Figure 19). With RFB and IOUT
terminals connected to the operational amplifier output and
inverting node, respectively, a precision voltage output is
achieved as
VOUT = −VREF × D/65,536 (AD5543)
(1)
VOUT = −VREF × D/16,384 (AD5553)
(2)
Note that the output voltage polarity is the opposite of the VREF
polarity for dc reference voltages.
These DACs are designed to operate with either negative or
positive reference voltages. The VDD power pin is only used by
the internal logic to drive the on and off states of the DAC switches.
VREF
R
R
R
2R
2R
2R
R
VDD
RFB
5kΩ
S2
S1
IOUT
GND
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY;
SWITCHES S1 AND S2 ARE CLOSED, VDD MUST BE POWERED.
Figure 18. Equivalent R-2R DAC Circuit
AD5543/AD5553
Note that a matching switch is used in series with the internal
5 kΩ feedback resistor. If users attempt to measure RFB, power
must be applied to VDD to achieve continuity.
VDD
R2
VREF
R1
VDD
RFB
AD5543/
VREF AD5553
IOUT1
GND
SYNC SCLK SDIN
C1
A1
VOUT = 0 TO –VREF
AGND
µCONTROLLER
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (4pF TO 6pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
Figure 19. Voltage Output Configuration
These DACs are also designed to accommodate ac reference
input signals. The AD5543 accommodates input reference
voltages in the range of −12 V to +12 V. The reference voltage
inputs exhibit a constant nominal input resistance value of 5 kΩ
± 30%. The DAC output (IOUT) is code dependent, producing
various resistances and capacitances. External amplifier choice
must take into account the variation in impedance generated by
the AD5543 on the inverting input node of the amplifier. The
feedback resistance, in parallel with the DAC ladder resistance,
dominates output voltage noise. To maintain good analog perf-
ormance, power supply bypassing of 0.01 µF to 0.1 µF ceramic or
chip capacitors, in parallel with a 1 µF tantalum capacitor, is
recommended. Due to degradation of PSRR in frequency, users
must avoid using switching power supplies.
Rev. G | Page 9 of 20
Share Link: 