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EVAL-AD5750EBZ(RevF) データシートの表示(PDF) - Analog Devices

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EVAL-AD5750EBZ Datasheet PDF : 36 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
AD5750/AD5750-1/AD5750-2
0.020
0.015
0.010
0.005
0
–0.005
–0.010
–0.015
–0.020
–0.025
AVDD = +24V
AVSS = –24V
+5V GAIN, NO LOAD
+10V GAIN, NO LOAD
±5V GAIN, NO LOAD
±10V GAIN, NO LOAD
–40
25
105
TEMPERATURE (°C)
Figure 11. Gain Error vs. Temperature
2.5
AVDD = +24V
2.0 AVSS = –24V
OUTPUT UNLOADED
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
+5V RANGE
+10V RANGE
–2.5
±5V RANGE
±10V RANGE
–3.0
–40
25
105
TEMPERATURE (°C)
Figure 12. Zero-Scale Error (Offset Error) vs. Temperature
0.003
0.002
0.001
+5V LINEARITY, NO LOAD
+10V LINEARITY, NO LOAD
±5V LINEARITY, NO LOAD
±10V LINEARITY, NO LOAD
0
–0.001
–0.002
–0.003
+11.2/–10.8
±15.0
±24.0
SUPPLY VOLTAGES (AVDD/AVSS)
±26.4
Figure 13. Integral Nonlinearity Error vs. Supply Voltage
Data Sheet
0.10
+5V POSITIVE TUE, NO LOAD
0.08
+10V POSITIVE TUE, NO LOAD
±5V POSITIVE TUE, NO LOAD
0.06
±10V POSITIVE TUE, NO LOAD
+5V NEGATIVE TUE, NO LOAD
0.04
+10V NEGATIVE TUE, NO LOAD
±5V NEGATIVE TUE, NO LOAD
0.02
±10V NEGATIVE TUE, NO LOAD
0
–0.02
–0.04
–0.06
–0.08
–0.10
+11.2/–10.8
±15.0
±24.0
SUPPLY VOLTAGES (AVDD/AVSS)
±26.4
Figure 14. Total Unadjusted Error (TUE) vs. Supply Voltages
1.2
1.0
0.8
±10V VDD HEADROOM, LOAD OFF
0.6
0.4
0.2
0
–40
25
105
TEMPERATURE (°C)
Figure 15. AVDD Headroom, ±10 V Range, Output Set to 10 V, Load Off
0.05
+5V RANGE
0.04
±10V RANGE
0.03
0.02
0.01
0
–0.01
–0.02
–0.03
–0.04
–0.05
–15 –13 –11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15
SOURCE/SINK CURRENT (mA)
Figure 16. Source and Sink Capability of Output Amplifier
Rev. F | Page 14 of 36

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