EVAL-AD5750EBZ(RevF) データシートの表示（PDF） - Analog Devices
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EVAL-AD5750EBZ
(Rev.:RevF)
(Rev.:RevF)
Analog Devices
EVAL-AD5750EBZ Datasheet PDF : 36 Pages
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AD5750/AD5750-1/AD5750-2
0.020
0.015
+4mA TO +20mA EXTERNAL RSET
0mA TO +20mA EXTERNAL RSET
0mA TO +24mA EXTERNAL RSET
0.010
0.005
0
–0.005
–0.010
–0.015
AVDD = +24V
AVSS = –24V
–40
±20mA EXTERNAL RSET
±24mA EXTERNAL RSET
25
105
TEMPERATURE (°C)
Figure 42. Gain Error vs. Temperature, External RSET Sense Resistor
0.08
0.06
0.04
+4mA TO +20mA INTERNAL RSET
0mA TO +20mA INTERNAL RSET
0mA TO +24mA INTERNAL RSET
±20mA INTERNAL RSET
±24mA INTERNAL RSET
0.02
0
–0.02
–0.04
–0.06
–0.08
AVDD = +24V
–0.10 AVSS = –24V
–40
25
105
TEMPERATURE (°C)
Figure 43. Gain Error vs. Temperature, Internal RSET Sense Resistor
1.4
1.2
AVDD COMPLIANCE
1.0
0.8
AVSS COMPLIANCE
0.6
0.4
0.2
0
–40
25
105
TEMPERATURE (°C)
Figure 44. Output Compliance vs. Temperature
Tested When IOUT = 10.8 mA, ±24 mA Range Selected
Data Sheet
12
0.000010
0.000008
10
0.000006
8
0.000004
6
IOUT
4
0.000002
0
–0.000002
2
–0.000004
0
VDD
–0.000006
–0.000008
–2
–0.000010
–10 –8 –6 –4 –2 0 2 4 6 8 10
TIME (ms)
Figure 45. VDD and Output Current (IOUT) vs. Time-On Power-Up
0
–2
–4
–6
–8
–10
–12
–14
–16
–18
–2 –1 0 1 2 3 4 5 6 7 8
TIME (µs)
Figure 46. Output Current (IOUT) vs. Time-On Output Enable
0.025
0.020
0.015
0.010
0.005
0
–12 –6 1
8 14 21 28 34 41 48 54 61 68
TIME (µs)
Figure 47. 4 mA to 20 mA Output Current Step
Rev. F | Page 20 of 36
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