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AD5755(2011) データシートの表示(PDF) - Analog Devices

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AD5755 Datasheet PDF : 48 Pages
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ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Transient currents of up to
100 mA do not cause SCR latch-up.
Table 4.
Parameter
AVDD, VBOOST_x to AGND, DGND
AVSS to AGND, DGND
AVDD to AVSS
AVCC to AGND
DVDD to DGND
Digital Inputs to DGND
Digital Outputs to DGND
REFIN, REFOUT to AGND
VOUT_x to AGND
+VSENSE_x, −VSENSE_x to AGND
IOUT_x to AGND
SWx to AGND
AGND, GNDSWx to DGND
Operating Temperature Range (TA)
Industrial1
Storage Temperature Range
Junction Temperature (TJ max)
64-Lead LFCSP
θJA Thermal Impedance2
Power Dissipation
Lead Temperature
Soldering
Rating
−0.3 V to +33 V
+0.3 V to −28 V
−0.3 V to +60 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to DVDD + 0.3 V or +7 V
(whichever is less)
−0.3 V to DVDD + 0.3 V or +7 V
(whichever is less)
−0.3 V to AVDD + 0.3 V or +7 V
(whichever is less)
AVSS to VBOOST_x or 33 V if using
the dc-to-dc circuitry
AVSS to VBOOST_x or 33 V if using
the dc-to-dc circuitry
AVSS to VBOOST_x or 33 V if using
the dc-to-dc circuitry
−0.3 to +33 V
−0.3 V to +0.3 V
−40°C to +105°C
−65°C to +150°C
125°C
20°C/W
(TJ max − TA)/θJA
JEDEC industry standard
J-STD-020
1 Power dissipated on chip must be derated to keep the junction temperature
below 125°C.
2 Based on a JEDEC 4-layer test board.
AD5755
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 11 of 48

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