AD652JP データシートの表示（PDF） - Analog Devices
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AD652JP Datasheet PDF : 28 Pages
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AD652
5
NC
+
VIN
–
6
10kΩ
7
10kΩ
8
AD652
SYNCHRONOUS
16kΩ
VOLTAGE-TO-
FREQUENCY
CONVERTER
4kΩ
9 10
NC NC
A. PLCC 0V TO 10V INPUT
5
6
10kΩ
NC 7
10kΩ
NC 8
AD652
SYNCHRONOUS
16kΩ
VOLTAGE-TO-
FREQUENCY
CONVERTER
4kΩ
9 10
+
VIN
NC
–
B. PLCC 0V TO 8V INPUT
5
6
10kΩ
+
7
VIN
10kΩ
–
NC 8
AD652
SYNCHRONOUS
16kΩ
VOLTAGE-TO-
FREQUENCY
CONVERTER
4kΩ
9 10
NC NC
C. PLCC 0V TO 5V INPUT
5
6
10kΩ
NC 7
10kΩ
8
VIN
±5V
AD652
SYNCHRONOUS
16kΩ
VOLTAGE-TO-
FREQUENCY
CONVERTER
4kΩ 5V REF
9 10
20
NC
NC = NO CONNECT
D. PLCC ±5V INPUT
Figure 13.
PLCC CONNECTIONS
The PLCC packaged AD652 offers additional input resistors not
found on the CERDIP-packaged device. These resistors provide
the user with additional input voltage ranges. Besides the 10 V
range available using the on-chip resistor in the CERDIP the
PLCC also offers 8 V and 5 V ranges. Figure 13A to Figure 13C
show the proper connections for these ranges with positive
input voltages. For negative input voltages, the appropriate
resistor should be tied to analog ground and the input voltage
should be applied to Pin 6, the + input of the op amp.
Bipolar input voltages can be accommodated by injecting
250 µA into Pin 5 with the use of the 5 V reference and the
input resistors. For the ±5 V or ±2.5 V range, the reference
output, Pin 20, should be tied to Pin 10. The input signal should
then be applied to Pin 8 for a ±5 V signal and to Pin 7 for a
±2.5 V signal. The input connections for a ±5 V range are
shown in Figure 13D. For a ±4 V range, the input signal should
be applied to Pin 9, and Pin 20 should be connected to Pin 8.
GAIN AND OFFSET CALIBRATION
The gain error of the AD652 is laser trimmed to within ±0.5%.
If higher accuracy is required, the internal 20 kΩ resistor must
be shunted with a 2 MΩ resistor to produce a parallel equivalent
that is 1% lower in value than the nominal 20 kΩ. Full-scale
adjustment is then accomplished using a 500 Ω series trimmer.
See Figure 14 and Figure 15. When negative input voltages are
used, this 500 Ω trimmer is tied to ground and Pin 6 is the
input pin.
+VS
250kΩ
1
2
20kΩ
3
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
0.02µF
2MΩ
500Ω
VIN
4
5
6
20kΩ
7
1mA
8
5V
REFERENCE
16
15
14
13
ONE
12
SHOT
11
10
Q CK
9
AND D "D"
Q FLOP
Figure 14. CERDIP Gain and Offset Trim
350kΩ
3
2
1
20
19
±3.5mV 500Ω
OFFSET
TRIM
20kΩ
AD652
SYNCHRONOUS
5V
VOLTAGE-TO-FREQUENCY REFERENCE
CONVERTER
4
18
0.02µF
5
17
2MΩ
500Ω
VIN
6
10kΩ
7
10kΩ
8 16kΩ
9
Q "D"
AND D FLOP
16
Q CK
15
1mA
ONE
SHOT
14
4kΩ
10
11
12
13
Figure 15. PLCC Gain and Offset Trim
Rev. C | Page 11 of 28
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