AD6636(Rev0) データシートの表示（PDF） - Analog Devices

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AD6636
(Rev.:Rev0)

150 MSPS Wideband Digital Down-Converter (DDC)

Analog Devices 

AD6636

PCLK

PxACK

tDPREQ

PxREQ

Px [15:0]

PxIQ

PxCH [2:0]

PxGAIN

CLKx

EXPx[2:0]

tCLKH

tDEXP

tCLK

tCLKL

Figure 9. Gain Control Word Output Switching Characteristics

(x = A, B, C, D for Individual Input Ports)

CLKx

INx[15:0]

EXPx[15:0]

tSI

tHI

tSEXP

tHEXP

Figure 10. Input Port Timing for Data

(x = A, B, C, D for Individual Input Ports)

tSPA

tHPA

tDPP

I [15:0]

tDPP

Q [15:0]

tDPP

RSSI [11:0]

tDPIQ

tDPCH

PxCH [2:0] = CHANNEL #

tDPGAIN

tDPP

I [15:0]

tDPP

Q [15:0]

tDPP

RSSI [11:0]

tDPIQ

tDPCH

PxCH [2:0] = CHANNEL #

tDPGAIN

Figure 11. Master Mode PxACK to PCLK Switching Characteristics

(x = A, B, C, D for Individual Output Ports)

Rev. 0 | Page 14 of 72

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