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XWM8728EDS(2001) データシートの表示(PDF) - Wolfson Microelectronics plc

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XWM8728EDS
(Rev.:2001)
Wolfson
Wolfson Microelectronics plc Wolfson
XWM8728EDS Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
WM8728
DSD AUDIO MONOPHASE INTERFACE
tBCH
tBCL
MCLK
tBCY
DIN/LRCIN
tDS
tDH
Figure 3 Normal DSD timing requirements
Product Preview
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
MCLK cycle time
tBCY
MCLK pulse width high
tBCH
MCLK pulse width low
tBCL
DIN/LRCIN set-up time to
tDS
MCLK rising edge
DIN/LRCIN hold time from
tDH
MCLK rising edge
TEST CONDITIONS
MIN
TYP
MAX
344
160
160
10
10
UNIT
ns
ns
ns
ns
ns
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 April 2001
7

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