AD723 データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD723 Datasheet PDF : 20 Pages
| |||
AD723
Pin Mnemonic
1
STND
2
SA
3
CE
4
TERM
5
RIN
6
GIN
7
BIN
8
AGND
9
RT
10
GT
11
BT
12
TGND
13
DVDD
14
DGND
15
HSYNC
16
VSYNC
17
4FSC
18
TVDET
19
CVSET
20
CV
21
YTRAP
22
AVDD
23
C
24
CSET
25
AVDD1
26
Y
27
YSET
28
AGND
PIN FUNCTION DESCRIPTIONS
Description
Equivalent Circuit
Encoding Standard Pin. A Logic HIGH signal is used for NTSC encoding, a Logic LOW Circuit A
signal signifies PAL.
When SA is high, phase alternation accompanies NTSC bandwidths and timing for
support of PAL (M) and “combination N” standards used in South America.
Circuit A
Chip Enable. A Logic HIGH input enables the encode function. A Logic LOW input
powers down the chip when not in use. Requires active HSYNC signal to activate.
Can be raised briefly to perform power-down load check.
Circuit A
Terminate. A Logic HIGH enables terminate function. RT, GT, and BT terminals are
tied to the termination ground, TGND. A Logic Low leaves these terminals floating.
Circuit A
Red Component Video Input. 0 mV to 714 mV ac-coupled.
Circuit B
Green Component Video Input. 0 mV to 714 mV ac-coupled.
Circuit B
Blue Component Video Input. 0 mV to 714 mV ac-coupled.
Circuit B
Analog Ground Connection. (Main Ground Connection.)
Input Terminal for RED Termination Switch. Can be left unconnected when switchable
input termination option is not used.
Circuit F
Input Terminal for GREEN Termination Switch. Can be left unconnected when switchable Circuit F
input termination option is not used.
Input Terminal for BLUE Termination Switch. Can be left unconnected when switchable Circuit F
input termination option is not used.
Termination Switch Ground Connection.
Digital Positive Supply Connection.
Digital Ground Connection.
Horizontal Sync Signal (or CSYNC signal).
Circuit A
Vertical Sync Signal.
Circuit A
4FSC Clock Input. For NTSC: 14.318 180 MHz, for PAL: 17.734 475 MHz.
Circuit A
Output Flag for TV Presence Detection. LOW signal signifies no TV present.
Circuit E
Composite Video Gain Setting Resistor.
Circuit C
Composite Video Output.
Circuit C
Luminance Trap Filter Tap. Attach L-C resonant network to reduce cross-color artifacts. Circuit D
Analog Positive Supply Connection.
Chrominance Output.
Circuit C
Chrominance Gain Setting Resistor.
Circuit C
Analog Positive Supply Connection.
Luminance Output (with CSYNC).
Circuit C
Luminance Gain Setting Resistor.
Circuit C
Analog Ground Connection.
POS
POS
1
2
3
4
15
16
17 Circuit A
DPOS
5
6
7
DGND
Circuit B
DPOS
1k⍀
DPOS
18
DGND
DGND
Circuit E
APOS
19
APOS
20
23
24
26
27
AGND
Circuit C
9
10
11
TGND
Circuit F
Figure 1. Equivalent Circuits
–4–
APOS
1k⍀
AGND
APOS
21
AGND
Circuit D
REV. 0
Share Link: 