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AD7478A データシートの表示(PDF) - Analog Devices

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AD7478A Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7476A/AD7477A/AD7478A
6-Lead SC70
VDD 1 AD7476A/ 6 CS
GND 2 AD7477A/ 5 SDATA
AD7478A
VIN 3 TOP VIEW 4 SCLK
(Not to Scale)
PIN CONFIGURATIONS
8-Lead MSOP
VDD 1 AD7476A/ 8 VIN
SDATA 2 AD7477A/ 7 GND
CS 3 AD7478A 6 SCLK
TOP VIEW
NC 4 (Not to Scale) 5 NC
NC = NO CONNECT
Mnemonic
CS
VDD
GND
VIN
SDATA
SCLK
NC
PIN FUNCTION DESCRIPTIONS
Function
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7476A/AD7477A/AD7478A and also frames the serial data transfer.
Power Supply Input. The VDD range for the AD7476A/AD7477A/AD7478A is from 2.35 V to 5.25 V.
Analog Ground. Ground reference point for all circuitry on the AD7476A/AD7477A/AD7478A. All analog input
signals should be referred to this GND voltage.
Analog Input. Single-ended analog input channel. The input range is 0 V to VDD.
Data Out. Logic output. The conversion result from the AD7476A/AD7477A/AD7478A is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7476A
consists of four leading zeros followed by the 12 bits of conversion data, which are provided MSB first. The data stream
from the AD7477A consists of four leading zeros followed by the 10 bits of conversion data followed by two trailing
zeros, provided MSB first. The data stream from the AD7478A consists of four leading zeros followed by the 8 bits
of conversion data followed by four trailing zeros, which are provided MSB first.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also
used as the clock source for the AD7476A/AD7477A/AD7478As conversion process.
No Connect.
–10–
REV. C

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