AD7451BRT データシートの表示（PDF） - Analog Devices

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AD7451BRT

Pseudo Differential Input, 1 MSPS, 10-/12-Bit ADCs in an 8-Lead SOT-23

Analog Devices 

PRELIMINARY TECHNICAL DATA

AD7451 - SPECIFICATIONS1

AD7451/AD7441

Parameter

CONVERSION RATE

Conversion Time

Track/Hold Acquisition Time2

Step Input

Throughput Rate6

POWER REQUIREMENTS

VDD

IDD5,7

Normal Mode(Static)

Normal Mode (Operational)

Full Power-Down Mode

Power Dissipation

Normal Mode (Operational)

Full Power-Down

Test Conditions/Comments

888ns with an 18MHz SCLK

Sine Wave Input

TBD

SCLK On or Off

VDD = 5 V.

VDD = 3 V.

SCLK On or Off

VDD =5 V.

VDD =3 V.

VDD =5 V. SCLK On or Off

VDD =3 V. SCLK On or Off

B Version1 Units

16

200

TBD

1

SCLK cycles

ns max

ns max

MSPS max

2.7/5.25

0.5

1.8

1.25

1

9

3.75

5

3

Vmin/max

mA typ

mA max

mA max

µA max

mW max

mW max

µW max

µW max

NOTES

1Temperature ranges as follows: B Versions: –40°C to +85°C.

2See ‘Terminology’ section.

3 A small DC input is applied to VIN- to provide a pseudo ground for VIN+

4Sample tested @ +25°C to ensure compliance.

5See POWER VERSUS THROUGHPUT RATE section.

6See ‘Serial Interface Section’.

7Measured with a midscale DC input.

Specifications subject to change without notice.

REV. PrC

–3–

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