AD7441BRT データシートの表示（PDF） - Analog Devices
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AD7441BRT Datasheet PDF : 15 Pages
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PRELIMINARY TECHNICAL DATA
AD7451/AD7441
PIN FUNCTION DESCRIPTION
Pin Mnemonic
VREF
VIN+
VIN-
GND
CS
SDATA
SCLK
VDD
Function
Reference Input for the AD7451/41. An external 2.5 V reference must be applied to this input.This pin
should be decoupled to GND with a capacitor of at least 0.1µF.
Non-Inverting Input.
Inverting Input. This pin sets the ground reference point for the VIN+ input. Connect to Ground or to
a small DC offset to provide a pseudo ground.
Analog Ground. Ground reference point for all circuitry on the AD7451/41. All analog input
signals and any external reference signal should be referred to this GND voltage.
Chip Select. Active low logic input. This input provides the dual function of initiating a conversion on
the AD7451/41 and framing the serial data transfer.
Serial Data. Logic Output. The conversion result from the AD7451/41 is provided on this out
put as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data
stream of the AD7451 consists of four leading zeros followed by the 12 bits of conversion data which
are provided MSB first; the data stream of the AD7441 consists of four leading zeros, followed by the
10-bits of conversion data, followed by two trailing zeros. In both cases, the output coding is Straight
(Natural) Binary.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock
input is also used as the clock source for the conversion process.
Power Supply Input. VDD is 2.7 V to 5.25 V. This supply should be decoupled to GND with a 0.1µF
Capacitor and a 10µF Tantalum Capacitor.
PIN CONFIGURATION 8-LEAD SOT-23
VDD 1
SCLK 2
SDATA 3
+5 4
AD7451/AD7441
SOT-23
TOP VIEW
(Not to Scale)
8 VREF
7 VIN +
6 VIN -
5 GND
PIN CONFIGURATION µSOIC
VREF 1
VIN + 2
VIN - 3
GND 4
AD7451/AD7441
µSOIC
TOP VIEW
(Not to Scale)
8 VDD
7 SCLK
6 SDATA
5 +5
–8–
REV. PrC
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