AD7523 データシートの表示（PDF） - Intersil

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AD7523

8-Bit, Multiplying D/A Converters

Intersil 

AD7523, AD7533

Offset Adjustment

1. Adjust VREF to approximately +10V.

2. Connect all digital inputs to “Logic 1”.

3. Adjust IOUT2 amplifier offset adjust trimpot for 0V ±1mV at

IOUT2 amplifier output.

4. Connect MSB (Bit 1) to “Logic 1” and all other bits to

“Logic 0”.

5. Adjust IOUT1 amplifier offset adjust trimpot for 0V ±1mV

at VOUT.

Gain Adjustment

1. Connect all digital inputs to V+.

2. Monitor VOUT for a -VREF (11/28) volts reading.

3. To increase VOUT, connect a series resistor, R2, of up to

250Ω between VOUT and RFEEDBACK.

4. To decrease VOUT, connect a series resistor, R1, of up to

250Ω between the reference voltage and the VREF

terminal.

Bipolar (Offset Binary) Operation - AD7533

The circuit configuration for operating the AD7533 in the

bipolar mode is given in Figure 3. Using offset binary digital

input codes and positive and negative reference voltage val-

ues, 4-Quadrant multiplication can be realized. The “Digital

Input Code/Analog Output Value” table for bipolar mode is

given in Table 4.

A “Logic 1” input at any digital input forces the corresponding

ladder switch to steer the bit current to IOUT1 bus. A “Logic 0”

input forces the bit current to IOUT2 bus. For any code the

IOUT1 and IOUT2 bus currents are complements of one

another. The current amplifier at IOUT2 changes the polarity of

IOUT2 current and the transconductance amplifier at IOUT1

output sums the two currents. This configuration doubles the

output range. The difference current resulting at zero offset

binary code, (MSB = “Logic 1”, all other bits = “Logic 0”), is cor-

rected by using an external resistor, (10MΩ), from VREF to

IOUT2.

TABLE 4. UNlPOLAR BINARY CODE - AD7533

DIGITAL INPUT

MSB LSB

(NOTE 1)

NOMINAL ANALOG OUTPUT

1111111111

- VR E F  55----11---12-- 

1000000001

- VR E F  5----11---2-- 

1000000000

0

0111111111

+ VR E F  5----11---2-- 

0000000001

+ VR E F  55----11---12-- 

0000000000

+ VR E F  55----11---22-- 

NOTES:

1. VOUT as shown in the Functional Diagram.

2. Nominal Full Scale for the circuit of Figure 6 is given by:

FSR = VREF1--5--0--1-2--2--3-  .

3. Nominal LSB magnitude for the circuit of Figure 3 is given by:

LSB = VREF5----11---2-- .

DIGITAL

INPUT

MAGNITUDE

BITS

±10V

BIPOLAR

ANALOG INPUT

V+

VREF

MSB

LSB

15 14

4

16

AD7533 1

13 3 2

GND

RFEEDBACK

OUT1

-

OUT2 6

+

SIGN BIT

10K

10K

-

5K 6

+

1/2 IH5140

FIGURE 4. 10-BIT AND SIGN MULTIPLYING DAC

VOUT

10-13

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