EVAL-CED1Z(Rev0) データシートの表示（PDF） - Analog Devices
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EVAL-CED1Z
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
EVAL-CED1Z Datasheet PDF : 32 Pages
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AD7262
SPECIFICATIONS
AVCC = 4.75 V to 5.25 V, CA_CBVCC = CC_CDVCC = 2.7 V to 5.25 V, VDRIVE = 2.7 V to 5.25 V, fSAMPLE = 1 MSPS and fSCLK = 40 MHz
for AD7262, fSAMPLE = 500 kSPS and fSCLK = 20 MHz for AD7262-5, VREF = 2.5 V internal/external; TA = −40°C to +105°C, unless
otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE1
Signal-to-Noise Ratio (SNR)2
Signal-to-(Noise + Distortion) Ratio
(SINAD)2
Total Harmonic Distortion (THD)2
Spurious-Free Dynamic Range (SFDR)2
Common-Mode Rejection Ratio (CMRR)3
ADC-to-ADC Isolation3
Bandwidth3
DC ACCURACY
Resolution
Integral Nonlinearity2
Differential Nonlinearity2
Positive Full-Scale Error2
Positive Full-Scale Error Match
Zero Code Error2
Zero Code Error Match
Negative Full-Scale Error2
Negative Full-Scale Error Match
Zero Code Error Drift
ANALOG INPUT
Input Voltage Range, VIN+ and VIN−
Common-Mode Voltage Range, VCM
DC Leakage Current
Input Capacitance3
Input Impedance3
REFERENCE INPUT/OUTPUT
Reference Output Voltage5
Reference Input Voltage Range
DC Leakage Current
Input Capacitance3
VREFA, VREFB Output Impedance3
Reference Temperature Coefficient
VREF Noise3
Min
Typ
Max
70
73
70
72
−85
−77
−97
−76
−90
1.2
1.7
±0.5
±0.5
±0.122
±0.018
±0.061
±0.092
±0.012
±0.061
±0.122
±0.018
±0.061
2.5
12
±1
±0.99
±0.305
±0.244
±0.305
VCM
±
VREF
2 × Gain
VCM − 100 mV
VCM + 100 mV
(VCC/2) − 0.4
(VCC/2) − 0.4
(VCC/2) − 0.6
±0.001
5
1
(VCC/2) + 0.2
(VCC/2) + 0.4
(VCC/2) + 0.8
±1
2.495
2.5
2.505
2.5
±0.3
±1
20
4
20
20
Unit
dB
dB
dB
dB
dB
dB
MHz
MHz
Bits
LSB
LSB
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
μV/°C
V
V
V
V
V
μA
pF
GΩ
V
V
μA
pF
Ω
ppm/°C
μV rms
Test Conditions/Comments
fIN = 100 kHz sine wave
PGA gain setting = 2
For PGA gain setting = 2, ripple
frequency of 50 Hz/60 Hz; see Figure 17
and Figure 18
@ −3 dB; PGA gain setting = 128
@ −3 dB; PGA gain setting = 2
Guaranteed no missed codes to 12 bits
Pregain calibration
Postgain calibration
Preoffset and pregain calibration
Postoffset and postgain calibration
Pregain calibration
Postgain calibration
VCM = AVCC/2; PGA gain setting ≥ 2
VCM = 2; PGA gain setting = 1;
see Figure 194
VCM = AVCC/2; PGA gain setting = 2
VCM = AVCC/2; 3 ≤ PGA gain setting ≤ 32
VCM = AVCC/2; PGA gain setting ≥ 48
2.5 V ± 5 mV max @ 25°C
External reference applied to
Pin VREFA/Pin VREFB
Rev. 0 | Page 3 of 32
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