EVAL-AD7655CB データシートの表示（PDF） - Analog Devices
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EVAL-AD7655CB Datasheet PDF : 28 Pages
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AD7655
TIMING SPECIFICATIONS
AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V; VREF = 2.5 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
Symbol Min Typ
Max
Unit
CONVERSION AND RESET (See Figure 21 and Figure 22)
Convert Pulse Width
Time Between Conversions
(Normal Mode/Impulse Mode)
CNVST Low to BUSY High Delay
t1
5
t2
2/2.25
t3
ns
μs
32
ns
BUSY High All Modes Except in Master Serial Read After Convert Mode
(Normal Mode/Impulse Mode)
t4
Aperture Delay
t5
2
End of Conversions to BUSY Low Delay
t6
10
Conversion Time
(Normal Mode/Impulse Mode)
t7
Acquisition Time
t8
250
RESET Pulse Width
t9
10
CNVST Low to EOC High Delay
t10
1.75/2
μs
ns
ns
1.75/2
μs
ns
ns
30
ns
EOC High for Channel A Conversion
(Normal Mode/Impulse Mode)
EOC Low after Channel A Conversion
t11
t12
45
1/1.25
μs
ns
EOC High for Channel B Conversion
t13
0.75
μs
Channel Selection Setup Time
Channel Selection Hold Time
t14
250
t15
ns
30
ns
PARALLEL INTERFACE MODES (See Figure 23 to Figure 27)
CNVST Low to DATA Valid Delay
t16
1.75/2
μs
DATA Valid to BUSY Low Delay
Bus Access Request to DATA Valid
Bus Relinquish Time
A/B Low to Data Valid Delay
t17
14
t18
t19
5
t20
ns
40
ns
15
ns
40
ns
MASTER SERIAL INTERFACE MODES (See Figure 28 and Figure 29)
CS Low to SYNC Valid Delay
CS Low to Internal SCLK Valid Delay1
t21
10
ns
t22
10
ns
CS Low to SDOUT Delay
t23
10
ns
CNVST Low to SYNC Delay, Read During Convert
(Normal Mode/Impulse Mode)
SYNC Asserted to SCLK First Edge Delay
Internal SCK Period2
Internal SCLK High2
Internal SCLK Low2
SDOUT Valid Setup Time2
SDOUT Valid Hold Time2
SCLK Last Edge to SYNC Delay2
CS High to SYNC HI-Z
CS High to Internal SCLK HI-Z
t24
250/500
ns
t25
3
ns
t26
23
40
ns
t27
12
ns
t28
7
ns
t29
4
ns
t30
2
ns
t31
1
ns
t32
10
ns
t33
10
ns
CS High to SDOUT HI-Z
BUSY High in Master Serial Read after Convert2
CNVST Low to SYNC Asserted Delay
t34
10
ns
t35
See Table 4
(Normal Mode/Impulse Mode)
SYNC Deasserted to BUSY Low Delay
t36
0.75/1
μs
t37
25
ns
Rev. B | Page 5 of 28
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