EVAL-CED1Z データシートの表示（PDF） - Analog Devices

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EVAL-CED1Z

18-Bit, 2.5 LSB INL, 570 kSPS SAR ADC

Analog Devices 

AD7679

Parameter

DIGITAL INPUTS

Logic Levels

VIL

VIH

IIL

IIH

DIGITAL OUTPUTS

Data Format5

Pipeline Delay6

VOL

VOH

POWER SUPPLIES

Specified Performance

AVDD

DVDD

OVDD

Operating Current

AVDD

DVDD8

OVDD8

POWER DISSIPATION8

TEMPERATURE RANGE9

Specified Performance

Conditions

Min

Typ

Max

Unit

–0.3

+0.8

V

2.0

DVDD + 0.3 V

–1

+1

μA

–1

+1

μA

ISINK = 1.6 mA

ISOURCE = –500 μA

500 kSPS Throughput

PDBUF High

PDBUF High @ 500 kSPS

PDBUF High @ 1 kSPS

PDBUF Low @ 500 kSPS

TMIN to TMAX

OVDD – 0.6

4.75

5

4.75

5

2.7

10.8

4.5

50

76

150

89

–40

0.4

V

V

5.25

V

5.25

V

DVDD + 0.37 V

mA

mA

μA

90

mW

μW

103

mW

+85

°C

1 See Analog Inputs section.

2 LSB means Least Significant Bit. With the ±4.096 V input range, 1 LSB is 31.25 μV.

3 See Definition of Specifications section. The nominal gain error is not centered at zero and is −0.029% of FSR. This specification is the deviation from this nominal

value. These specifications do not include the error contribution from the external reference, but do include the error contribution from the reference buffer if used.

4 All specifications in dB are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale unless otherwise specified.

5 Parallel or Serial 18-Bit.

6 Conversion results are available immediately after completed conversion.

7 The max should be the minimum of 5.25 V and DVDD + 0.3 V.

8 Tested in Parallel Reading mode.

9 Contact factory for extended temperature range.

Rev. A | Page 4 of 28

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