AD7940BRMZ データシートの表示（PDF） - Analog Devices

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AD7940BRMZ

3 mW, 100 kSPS, 14-Bit ADC in 6-Lead SOT-23

Analog Devices 

POWER VS. THROUGHPUT RATE

By using the power-down mode on the AD7940 when not

converting, the average power consumption of the ADC

decreases at lower throughput rates. Figure 19 shows how as the

throughput rate is reduced, the part remains in its shutdown

state longer, and the average power consumption over time

drops accordingly.

For example, if the AD7940 is operated in a continuous

sampling mode, with a throughput rate of 10 kSPS and an SCLK

of 2.5 MHz (VDD = 3.6 V), and the device is placed in power-

down mode between conversions, the power consumption is

calculated as follows. The maximum power dissipation during

normal operation is 6.84 mW (VDD = 3.6 V). If the power-up

time from power-down is 1 µs, and the remaining conversion

time is 6.4 µs, (using a 16 SCLK transfer), then the AD7940 can

be said to dissipate 6.84 mW for 7.4 µs during each conversion

cycle. With a throughput rate of 10 kSPS, the cycle time is 100

µs. For the remainder of the conversion cycle, 92.6 µs, the part

remains in power-down mode. The AD7940 can be said to

dissipate 1.08 µW for the remaining 92.6 µs of the conversion

cycle. Therefore, with a throughput rate of 10 kSPS, the average

power dissipated during each cycle is

(7.4/100) × (6.84 mW) + (92.6/100) × (1.08 µW) = 0.51 mW

AD7940

Figure 19 shows the power dissipation versus the throughput

rate when using the power-down mode with 3.6 V supplies and

a 2.5 MHz SCLK.

10

VDD = 3.6V

FSCLK = 2.5MHz

1

0.1

0.01

0

5 10 15 20 25 30 35 40 45 50

THROUGHPUT (kSPS)

Figure 19. Power vs. Throughput Using Power-Down Mode at 3.6 V

Rev. A | Page 15 of 20

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