AD7945BN データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD7945BN Datasheet PDF : 16 Pages
| |||
AD7943/AD7945/AD7948
AD7945 TIMING SPECIFICATIONS1 (TA = TMIN to TMAX, unless otherwise noted)
Parameter
Limit @
VDD = +3 V to +3.6 V
Limit @
VDD = +4.5 V to +5.5 V
Units
tDS
35
20
tDH
10
10
tCS
60
40
tCH
0
0
tWR
60
40
ns min
ns min
ns min
ns min
ns min
NOTES
1All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
Specifications subject to change without notice.
Description
Data Setup Time
Data Hold Time
Chip Select Setup Time
Chip Select Hold Time
Write Pulsewidth
tCS
tCH
CS
tWR
WR
tDS
tDH
DB11–DB0
DATA VALID
Figure 3. AD7945 Timing Diagram
AD7948 TIMING SPECIFICATIONS1 (TA = TMIN to TMAX, unless otherwise noted)
Parameter
Limit @
VDD = +3 V to +3.6 V
Limit @
VDD = +4.5 V to +5.5 V
Units
tDS
45
30
tDH
10
10
tCWS
0
0
tCWH
0
0
tLWS
0
0
tLWH
0
0
tWR
60
40
ns min
ns min
ns min
ns min
ns min
ns min
ns min
NOTES
1All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
Specifications subject to change without notice.
Description
Data Setup Time
Data Hold Time
CSMSB or CSLSB to WR Setup Time
CSMSB or CSLSB to WR Hold Time
LDAC to WR Setup Time
LDAC to WR Hold Time
Write Pulsewidth
tCWS
CSMSB
CSLSB
tCWH
tCWS
LDAC
WR
DB7–DB0
tWR
tDS
tDH
DATA
VALID
tLWS
tWR
tDS
DATA
VALID
Figure 4. AD7948 Timing Diagram
tCWH
tLWH
tDH
–6–
REV. B
Share Link: 