AD8384 データシートの表示（PDF） - Analog Devices
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AD8384 Datasheet PDF : 24 Pages
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AD8384
SPECIFICATIONS
DecDriver
Table 1. @ 25°C, AVCC = 15.5 V, DVCC = 3.3 V, TA MIN = 0°C, TA MAX = 85°C, VRH = 9.5 V, VRL = V1 = V2 = 7 V,
unless otherwise noted
Parameter
Conditions
Min
Typ Max
VIDEO DC PERFORMANCE1
TA MIN to TA MAX
VDE
DAC Code 450 to 800
–7.5
+7.5
VCME
DAC Code 450 to 800
–3.5
+3.5
VIDEO OUTPUT DYNAMIC PERFORMANCE
TA MIN to TA MAX , VO = 5 V Step, CL = 150 pF
Data Switching Slew Rate
20% to 80%
460
Invert Switching Slew Rate
20% to 80%
560
Data Switching Settling Time to 1%
19 24
Data Switching Settling Time to 0.25%
30 50
Invert Switching Settling Time to 1%
VO = 10 V Step
75 120
Invert Switching Settling Time to 0.25%
VO = 10 V Step
250 500
Invert Switching Overshoot
CLK and Data Feedthrough2
VO = 10 V Step
100 200
10
All-Hostile Crosstalk3
Amplitude
10
Glitch Duration
30
DAC Transition Glitch Energy
DAC Code 511 to 512
0.3
VIDEO OUTPUT CHARACTERISTICS
Output Voltage Swing
AVCC – VOH, VOL – AGND
1.1 1.3
Output Voltage—Grounded Mode
0.25
Data Switching Delay: t94
INV Switching Delay: t105
50 % of VIDx
50 % of VIDx
10
12 14
13
15 17
Output Current
100
Output Resistance
22
REFERENCE INPUTS
V1 Range
V2 ≥ (V1-0.25V)
5.25
AVCC – 4
V2 Range
V2 ≥ (V1-0.25V)
5.25
AVCC – 4
V1 Input Current
–3
V2 Input Current
–14
VRL Range
VRH ≥ VRL
V1 – 0.5
AVCC – 1.3
VRH Range
VRH ≥ VRL
VRL
AVCC
(VRH–VRL) Range
VFS = 2(VRH – VRL)
0
2.75
VRH Input Resistance
To VRL
20
VRL Bias Current
–0.2
VRH Input Current
125
RESOLUTION
Coding
Binary
10
Unit
mV
mV
V/µs
V/µs
ns
ns
ns
ns
mV
mV p-p
mV p-p
ns
nV-s
V
V
ns
ns
mA
Ω
V
V
µA
µA
V
V
V
kΩ
µA
µA
Bits
1 VDE = differential error voltage; VCME = common-mode error voltage; VFS = full-scale output voltage = 2 × (VRH – VRL). See the Accuracy section.
2 Measured differentially on two outputs as CLK and DB(0:9) are driven and STSQ and XFR are held LOW.
3 Measured differentially on two outputs as the other four are transitioning by 5 V. Measured for both states of INV.
4 Measured from 50% of rising CLK edge to 50% of output change. Measurement is made for both states of INV.
5 Measured from 50% of rising CLK edge to 50% of output change. Refer to Figure 7 for the definition.
Rev. 0 | Page 3 of 24
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