AD9101 データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD9101 Datasheet PDF : 12 Pages
| |||
AD9101
provides a good example. It operates on a single negative supply
with the input range from 0 V to –2 V. By connecting Pins 1
and 2 (RTN) to a +0.33 V level, rather than its usual ground
connection, a bipolar ± 0.25 V input is shifted to 0 V to –2 V at
the AD9101’s output (see Figure 3 in the Applications section.)
APPLICATIONS
Because of its rapid acquisition and low distortion, the AD9101
is useful in a wide range of signal processing.
Choosing Between the AD9100 and AD9101
The first obvious difference between the AD9100 and AD9101
is sample rate. Simplistically, any high resolution system (12–16
bits) operating below 25 MSPS will use the AD9100 and 8–12
bit systems operating above 25 MSPS will use the AD9101.
There are, however, some subtle characteristics of these high
performance track-and-hold amplifiers that create some excep-
tions to these guidelines. The typical curve entitled “Dynamic
Range vs. Analog Frequency” should be considered when
choosing between these two high performance track-and-holds.
When speed is critical, the AD9101 should receive strong con-
sideration, even in high resolution systems. Using a reduced sig-
nal amplitude through the AD9100 greatly reduces slew limiting
effects and should also be considered when converting high fre-
quency (up to 70 MHz) analog signals with encode rates below
25 MSPS.
Sampler for Flash ADC
Flash ADCs typically suffer degradation of dynamic range as
signal frequency increases. The AD9101 was designed specifi-
cally for the purpose of boosting this performance and allowing
users to obtain maximum performance with flash ADCs. Figure
3 shows the block diagram and timing relationship for an 8-bit,
125 MSPS converter.
+5V
1k
3k
1k
0.33V
+
–
0.1µF
RTN
40Ω
AC
AD9101
AD9002
CLOCK 1
(AD9101)
1.6 ns
CLOCK 2
(AD9002)
3.6 ns
TRACK
CLOCK 1
HOLD
4.4 ns
3.6 ns
TRACK
HOLD
44 ns
CLOCK 2
3.6 ns
TRACK
HOLD
3.5 ns
4.5 ns
TRACK
HOLD
3.5 ns
4.5 ns
TRACK
HOLD
3.5 ns
Figure 3. AD9101 with 8-Bit, 125 MSPS Flash
Figure 4 contrasts performance of the flash converter alone vs.
the circuit of Figure 3.
Figures 5 and 6 show the block diagrams and dynamic range
improvement when the AD9101 is used ahead of an 10-bit, 75
MSPS flash converter. The AD9630 is not required if the input
frequency is limited to 40 MHz.
–70
–65
–60
–55
WITH AD9101
–50
WORST HARMONIC
SNR W/HARMONICS
WITH AD9101
–45
–40
–35 ENCODE = 125 MSPS
–30
1
10
100
MHz
Figure 4. AD9002 Dynamic Range With and Without
AD9101
AD9101
27Ω
AD9630
AD9060
CLOCK 1
"HOLD"
CLOCK 1
8.5 ns 8 ns
CLOCK 2
8.5 ns
"HOLD"
8 ns
8.5 ns
"TRACK"
"TRACK"
"TRACK"
2.5 ns
CLOCK 2
"HOLD"
"HOLD"
"HOLD"
8.25 ns 8.25 ns 8.25 ns 8.25 ns 8.25 ns
"TRACK"
"TRACK"
Figure 5. AD9101 with 10-Bit, 75 MSPS ADC
–70
WITH AD9101
–65
–60 WITH AD9101
WORST
HARMONIC
SNR W/
HARMONICS
–55
–50
–45
–40
ENCODE = 60 MSPS
–35
–30
1
10
100
MHz
Figure 6. AD9060 Dynamic Performance With and With-
out AD9101
REV. 0
–7–
Share Link: 