AD9233 データシートの表示（PDF） - Analog Devices

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AD9233

Complete 10-Bit/ 20 MSPS/ 80 mW CMOS A/D Converter

Analog Devices 

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD9233

(LSB) D0 1

D1 2

D2 3

D3 4

D4 5

D5 6

DRGND 7

DRVDD 8

D6 9

D7 10

D8 11

D9 12

PIN 1

INDICATOR

AD9233

TOP VIEW

(Not to Scale)

PIN 0 (EXPOSED PADDLE): AGND

36 PDWN

35 RBIAS

34 CML

33 AVDD

32 AGND

31 VIN–

30 VIN+

29 AGND

28 REFT

27 REFB

26 VREF

25 SENSE

NC = NO CONNECT

Table 7. Pin Function Description

Pin No.

Mnemonic

0, 21, 23, 29,

32, 37, 41

AGND

1 to 6, 9 to 14

D0 (LSB) to D11 (MSB)

7, 16, 47

DRGND

8, 17, 48

DRVDD

15

OR

18

SDIO/DCS

19

20

22, 24, 33, 40, 42

25

26

27

28

30

31

34

35

SCLK/DFS

CSB

AVDD

SENSE

VREF

REFB

REFT

VIN+

VIN–

CML

RBIAS

36

38

39

43

44

45, 46

PDWN

CLK+

CLK–

OEB

DCO

NC

Figure 3. Pin Configuration

Description

Analog Ground. (Pin 0 is the exposed thermal pad on the bottom of the package.)

Data Output Bits.

Digital Output Ground.

Digital Output Driver Supply (1.8 V to 3.3 V).

Out-of-Range Indicator.

Serial Port Interface (SPI)® Data Input/Output (Serial Port Mode); Duty Cycle Stabilizer Select

(External Pin Mode). See Table 10.

SPI Clock (Serial Port Mode); Data Format Select Pin (External Pin Mode). See Table 10.

SPI Chip Select (Active Low).

Analog Power Supply.

Reference Mode Selection. See Table 9.

Voltage Reference Input/Output.

Differential Reference (−).

Differential Reference (+).

Analog Input Pin (+).

Analog Input Pin (−).

Common-Mode Level Bias Output.

External Bias Resister Connection. A 10 kΩ resister must be connected between this pin and

analog ground (AGND).

Power-Down Function Select.

Clock Input (+).

Clock Input (−).

Output Enable (Active Low).

Data Clock Output.

No Connection.

Rev. A | Page 9 of 44

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