AD9235BCP-40EB(RevB) データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD9235BCP-40EB Datasheet PDF : 32 Pages
| |||
AD9235–SPECIFICATIONS
(AVDD = 3 V, DRVDD = 2.5 V, Maximum Sample Rate, 2 V p-p Differential Input,
DC SPECIFICATIONS 1.0 V internal reference, TMIN to TMAX, unless otherwise noted.)
Parameter
Test AD9235BRU-20
Temp Level Min Typ Max
AD9235BRU-40 AD9235BRU/BCP-65
Min Typ Max Min Typ Max Unit
RESOLUTION
Full VI
12
12
12
Bits
ACCURACY
No Missing Codes Guaranteed
Offset Error
Gain Error1
Differential Nonlinearity (DNL)2
Integral Nonlinearity (INL)2
Full VI
Full VI
Full VI
Full IV
25°C I
Full IV
25°C I
12
12
12
Bits
± 0.30 ± 1.20
± 0.50 ± 1.20
± 0.50 ± 1.20 % FSR
± 0.30 ± 2.40
± 0.50 ± 2.50
± 0.50 ± 2.60 % FSR
± 0.35 ± 0.65
± 0.35 ± 0.75
± 0.40 ± 0.80 LSB
± 0.35
± 0.35
± 0.35
LSB
± 0.45 ± 0.80
± 0.50 ± 0.90
± 0.70 ± 1.30 LSB
± 0.40
± 0.40
± 0.45
LSB
TEMPERATURE DRIFT
Offset Error
Full V
±2
±2
±3
ppm/°C
Gain Error1
Full V
± 12
± 12
± 12
ppm/°C
INTERNAL VOLTAGE
REFERENCE
Output Voltage Error (1 V Mode) Full VI
Load Regulation @ 1.0 mA
Full V
Output Voltage Error (0.5 V Mode) Full V
Load Regulation @ 0.5 mA
Full V
± 5 ± 35
0.8
± 2.5
0.1
± 5 ± 35
0.8
± 2.5
0.1
± 5 ± 35 mV
0.8
mV
± 2.5
mV
0.1
mV
INPUT REFERRED NOISE
VREF = 0.5 V
25°C V
0.54
0.54
0.54
LSB rms
VREF = 1.0 V
25°C V
0.27
0.27
0.27
LSB rms
ANALOG INPUT
Input Span, VREF = 0.5 V
Full IV
1
1
1
V p-p
Input Span, VREF = 1.0 V
Full IV
2
2
2
V p-p
Input Capacitance3
Full V
7
7
7
pF
REFERENCE INPUT
RESISTANCE
Full V
7
7
7
kΩ
POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD2
IDRVDD2
PSRR
Full IV
Full IV
Full V
Full V
Full V
2.7 3.0 3.6
2.25 3.0 3.6
30
2
± 0.01
2.7 3.0 3.6
2.25 3.0 3.6
55
5
± 0.01
2.7 3.0 3.6
2.25 3.0 3.6
100
7
± 0.01
V
V
mA
mA
% FSR
POWER CONSUMPTION
DC Input4
Sine Wave Input2
Standby Power5
Full V
Full VI
Full V
90
95 110
1.0
165
180 205
1.0
300
mW
320 350 mW
1.0
mW
NOTES
1Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.0 V external reference).
2Measured at maximum clock rate, fIN = 2.4 MHz, full-scale sine wave, with approximately 5 pF loading on each output bit.
3Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 2 for the equivalent analog input structure.
4Measured with dc input at maximum clock rate.
5Standby power is measured with a dc input, the CLK pin inactive (i.e., set to AVDD or AGND).
Specifications subject to change without notice.
–2–
REV. B
Share Link: 