AD9239-250KITZ データシートの表示（PDF） - Analog Devices

部品番号

コンポーネント説明

メーカー

AD9239-250KITZ

Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC

Analog Devices 

Data Sheet

AD9239

DIGITAL SPECIFICATIONS

AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, 1.25 V p-p differential input, AIN = −1.0 dBFS, DCS enabled, unless

otherwise noted.

Table 3.

Parameter1

CLOCK INPUTS (CLK+, CLK–)

Logic Compliance

Differential Input Voltage

Input Voltage Range

Internal Common-Mode Bias

Input Common-Mode Voltage

High Level Input Voltage (VIH)

Low Level Input Voltage (VIL)

High Level Input Current (IIH)

Low Level Input Current (IIL)

Differential Input Resistance

Input Capacitance

LOGIC INPUTS (PDWN, CSB, SDI/

SDIO, SCLK, RESET, PGMx)2

Logic 1 Voltage

Logic 0 Voltage

Logic 1 Input Current (CSB)

Logic 0 Input Current (CSB)

Logic 1 Input Current

(SCLK, PDWN, SDI/SDIO,

RESET, PGMx)

Logic 0 Input Current

(SCLK, PDWN, SDI/SDIO,

RESET, PGMx)

Input Resistance

Input Capacitance

LOGIC OUTPUTS (SDO)

Logic 1 Voltage

Logic 0 Voltage

DIGITAL OUTPUTS

(DOUT + x, DOUT − x)

Logic Compliance

Differential Output Voltage

Common-Mode Level

Temp

Full

Full

Full

Full

Full

Full

Full

Full

Full

25°C

25°C

Full

Full

Full

Full

Full

Full

25°C

25°C

Full

Full

Full

Full

AD9239BCPZ-170

Min

Typ

Max

LVPECL/LVDS/CMOS

0.2

6

AVDD −

0.3

AVDD +

1.6

1.2

1.1

AVDD

1.2

3.6

0

0.8

−10

+10

−10

+10

16

20

24

4

0.8 ×

AVDD

0

−60

55

0

30

4

1.2

0

0.2 ×

AVDD

AVDD +

0.3

0.3

Current

mode

logic

0.8

DRVDD/2

AD9239BCPZ-210

Min

Typ

Max

LVPECL/LVDS/CMOS

0.2

6

AVDD −

0.3

AVDD +

1.6

1.2

1.1

AVDD

1.2

3.6

0

0.8

−10

+10

−10

+10

16

20

24

4

0.8 ×

AVDD

0

−60

55

0

30

4

1.2

0

0.2 ×

AVDD

AVDD +

0.3

0.3

Current

mode

logic

0.8

DRVDD/2

AD9239BCPZ-250

Min

Typ

Max

LVPECL/LVDS/CMOS

0.2

6

AVDD −

0.3

AVDD +

1.6

1.2

1.1

AVDD

1.2

3.6

0

0.8

−10

+10

−10

+10

16

20

24

4

0.8 ×

AVDD

0

−60

55

0

30

4

1.2

0

0.2 ×

AVDD

AVDD +

0.3

0.3

Current

mode

logic

0.8

DRVDD/2

Unit

V p-p

V

V

V

V

V

µA

µA

kΩ

pF

V

V

µA

µA

µA

µA

kΩ

pF

V

V

V

V

1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and details on how these tests were completed.

2 Specified for 13 SDI/SDIO pins sharing the same connection.

Rev. E | Page 5 of 40

Share Link: